MB86437 Datasheet, PDF (6/35 Pages) Fujitsu Component Limited. – 3 V Single Power Supply Audio Interface Unit (AIU)

MB86437
s FUNCTIONAL DESCRIPTION
1. Register Settings
The MB86437 IC chip controls all electronic volume, switch, tone generator circuit and power-down control circuit
by means of the SRD, STB and SRC input.
(1) Mode setting
The data format consists of 10 bits of serial data. The first 5 bits (A4 to A0) are the address and the next 5 bits (D4
to D0) are data. SRD is clocked in on the rising edge of SRC and latched when STB is "L". During power-down, the
register is not reset and writing to the register is possible. A reset and data initialization occurs when XPRST is "L".
Data Address Meaning
Data Setting
After a Reset
D4 D3 D2 D1 D0
D4
Data Meaning
D3
D2
D1
D0
A00 00000 Test mode
0 0 0 0 0 00000: Normal operation (writing prohibited)
A01 00001 EV0 gain
0 1 1 1 X EV0 [0000: –7 dB to 1111: 8 dB, step 1 dB,
X
Reset: 0 dB]
A02 00010 EV1 gain
0 1 1 1 X EV1 [0000: –7 dB to 1111: 8 dB, step 1 dB,
X
Reset: 0 dB]
A03 00011 EV2 gain
X X 0 1 1X
X
EV2 [000: –15 dB to 111: 15 dB,
step 5 dB, Reset: 0 dB]
A04 00100 Transmit mute 1 0 X X X 0 Receive X
X
X
Transmit
(SW3, 4, 5)
mute
mute
Receive mute 1
(SW6b, 7b,
(SW3, 4,
(SW6b, 7b, 8b,
8b, 9b, 9c)
5)
9b, 9c)
1: Mute 1
1: Mute 1
0: No mute
0: No mute
A05 00101 SW8, 3, 4, 5
mute 2
1 X 1 1 1 SW8
X
1: Mute 2
0: No mute
Valid when
D4 of A04 is
"0"
SW3
SW4
SW5
1: Mute 2 1: Mute 2 1: Mute 2
0: No mute 0: No mute 0: No mute
Valid when D0 of A04 is "0"
A06 00110
EV7 gain/SW7b, 1 0 1 1 1 EV7
9b, 9c, 6b mute
[00: –9 dB to 11: 0 dB,
2
step 3 dB, Reset: –3
dB]
SW7b
SW9b9c SW6b
1: Mute 2 1: Mute 2 1: Mute 2
0: No mute 0: No mute 0: No mute
Valid when D4 of A04 is "0"
A07 00111 SW2, 11, 12, 10 X 1 0 0 0 X
control
SW2
1: ON
0: OFF
SW11
1: ON
0: OFF
SW12
1: ON
0: OFF
SW10
1: ON
0: OFF
A08 01000 Digital parallel X 0 0 0 0 X
output
L03
L02
L01
L00
A09 01001 EV3 gain
0 1 1 1 X EV3 [0000: 8 dB to 1111: 23 dB, step 1 dB,
X
Reset: 15 dB]
(Continued)
6