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MB86437 Datasheet, PDF (5/35 Pages) Fujitsu Component Limited. – 3 V Single Power Supply Audio Interface Unit (AIU)
MB86437
s BLOCK DIAGRAM
SGC (24) BTPO (31) BTPI (30) BBO (29)
STA (28) VS 1 (8) VS 2 (23) VS 3 (48) VS 4 (25)
SGI
(26)
SGO
(27)
DOUT
(34)
SYNC
(35)
CLK
(36)
DIN
(33)
TCLK
(37)
MDI
(13)
TBO
(10)
TBI
(11)
SRD
(39)
SRC
(40)
STB
(41)
VREF
AMP5
generator
AO SGC
SGC
VREF generator block
SW1
0 dB (RST)
EV0
(Invert)
0 dB
SW3
Microphone amp (1)
4bit AMP1
SGC
A/D
BPF
–7 to 8 dB
1 dB step
SW4
AMP2
SGC
Codec block
PLL
512 K 0 dB (RST)
Transmitting block
Microphone amp (2)
SGC
SW5
EV1 0 dB SW13
D/A
LPF
4bit –7 to 8 dB
1 dB step
0 dB (RST)
–
+
AMP3
EV2
(Invert)
3bit
SW10
SW11
SINGLE: –14 dBv Tone generator
DUAL: –14 dBv block
–15 dB 15 dB
DUAL
(RST) (RST)
TONE
EV4
EV3
+
(Invert)
3bit
4bit
ATT
SW16
–30 to 0 dB 8 to 23 dB
–15 dB 5 dB step 1 dB step
–14 dB
(RST)
EV5
3bit 0 dB SW 2
–18 to –11dB
1 dB step
SGC –15 to 15 dB, 5 dB step
SW12
0 dB SW8b –
+ PD
SGC SW8a
–8 dB (RST)–14 to 0 dB
EV6 2 dB step
3bit 0 dB SW6b
–
+ PD
SGC
SW6a
0 dB
MICO
(18)
MIC
(19)
XMIC
(20)
JMICO
(22)
JMIC
(21)
TAUD
(17)
EXSD
(16)
DSCK
(15)
PTBO
(12)
SWI
(1)
SWO
(2)
RAUD
(3)
EAR
(6)
SGC
–
+
AMP4
Receiving
block
AO
SW15
PD
Receiver speaker drive block –
+
–3 dB (RST)
SGC
–9 to 0 dB
EV7 3 dB step
2bit
0 dB SW7b
SGC
Earphone speaker drive block
–
+ PD
SW7a
XEAR
(7)
JEAR
(5)
CONTROL
LOGIC
Control
block
P-
SAVE
10 dB (RST)
0 dB, 10 dB
6 dB (RST)
0 dB, 6 dB
EV8
1bit 0 dB SW9b
EV9
1bit 0 dB SW9c
–
+ PD
SGC SW9a
Tone speaker drive block
SW14
TONE
(9)
XPRSTLO0 LO1 LO2 LO3 PS (47) VD1 (4) VD2 (14) VD3 (32) VD4 (38)
(42) (43) (44) (45) (46)
: Digital input
: Digital output
: Analog input
: Analog output
Electronic volume:
• (RST) indicates the value for reset
• (inverting) indicates the inverted phase
between input and output.
: Input/output
: VDD
: GND
5