MB85RC16 Datasheet, PDF (6/20 Pages) Fujitsu Component Limited. – Memory FRAM 16 K (2 K x 8) Bit I2C

MB85RC16
■ DEVICE ADDRESS WORD
Following the start condition, the 8 bit device address word is input. Inputting the device address word decides
whether the master or the slave drives the data line. However, the clock is always driven by the master. The
device address word (8bits) consists of a device Type code (4bits), memory upper address code (3bits), and
a Read/Write code (1bit).
• Device Type Code (4bits)
The upper 4 bits of the device address word are a device type code that identifies the device type, and are
fixed at “1010” for the MB85RC16.
• Memory Upper Address Code (3bits)
Following the device type code, the 3 bits of the memory upper address code are input.
The slave address selection is not performed by the external pin setting on this device. These 3 bits are not
the setting bits for the slave address, but the upper 3-bit setting bits for the memory address.
• Read/Write Code (1bit)
The 8th bit of the device address word is the R/W (Read/Write) code. When the R/W code is “0” input, a
write operation is enabled, and the R/W code is “1” input, a read operation is enabled for the MB85RC16. If
the device code is not “1010”, the Read/Write operation is not performed and the standby state is chosen.
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DS501-00001-2v0-E