MB85R1002A Datasheet, PDF (4/16 Pages) Fujitsu Component Limited. – Memory FRAM CMOS 1 M Bit (64 K x 16)

MB85R1002A
■ FUNCTIONAL TRUTH TABLE
Mode
CE1 CE2 WE OE LB UB
HXXXXX
I/O1 to I/O8
I/O9 to I/O16
Supply
Current
XLXXXX
Standby Precharge
Hi-Z
XXHHXX
Hi-Z
Standby
(ISB)
XXXXHH
Read
L L Data Output Data Output
L
H
H
L
L
H Data Output
Hi-Z
HL
Hi-Z
Data Output
Read
(Pseudo-SRAM,
OE control*¹)
Write
L L Data Output Data Output
L HH
L H Data Output
Hi-Z
HL
Hi-Z
Data Output _Operation
L L Data Input Data Input
(ICC)
L
H
L
X
L
H
Data Input
Hi-Z
HL
Hi-Z
Data Input
Write
(Pseudo-SRAM,
WE control*²)
LH
L L Data Input Data Input
H L H Data Input
Hi-Z
HL
Hi-Z
Data Input
Note: L = VIL, H = VIH, X can be either VIL or VIH, Hi-Z = High Impedance
: Latch address and latch data at falling edge,
: Latch address and latch data at rising edge
*1 : OE control of the Pseudo-SRAM means the valid address at the falling edge of OE to read.
*2 : WE control of the Pseudo-SRAM means the valid address and data at the falling edge of WE to write.
4
DS501-00004-0v01-E