MB39C007 Datasheet, PDF (16/52 Pages) Fujitsu Component Limited. – 2 ch DC/DC Converter IC Built-in Switching FET & voltage detection function, PFM/PWM Synchronous Rectification, and Down Conversion Support

MB39C007
[3] About conversion efficiency
The conversion efficiency can be improved by reducing the loss of the DC/DC converter circuit.
The total loss (PLOSS) of the DC/DC converter is roughly divided as follows :
PLOSS = PCONT + PSW + PC
PCONT : Control system circuit loss (The power used for this IC to operate, including the gate driving power for
internal SW FETs)
PSW : Switching loss (The loss caused during switching of the IC's internal SW FETs)
PC : Continuity loss (The loss caused when currents flow through the IC's internal SW FETs and external
circuits )
The IC's control circuit loss (PCONT) is extremely small, less than 100 mW* (with no load).
As the IC contains FETs which can switch faster with less power, the continuity loss (PC) is more predominant
as the loss during heavy-load operation than the control circuit loss (PCONT) and switching loss (PSW) .
Furthermore, the continuity loss (PC) is divided roughly into the loss by internal SW FET ON-resistance and by
external inductor series resistance.
PC = IOUT2 × (RDC + D × RONP + (1 − D) × RONN)
D
: Switching ON-duty cycle ( = VOUT / VIN)
RONP
: Internal P-ch SW FET ON resistance
RONN
: Internal N-ch SW FET ON resistance
RDC : External inductor series resistance
IOUT
: Load current
The above formula indicates that it is important to reduce RDC as much as possible to improve efficiency by
selecting components.
* : The loss in the successive operation mode. This IC suppresses the loss in order to execute the PFM operation
in the low load mode (less than 100 μA in no load mode). Mode is changed by the current peak value IPK which
flows into switching FET. The threshold value is about 30 mA.
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DS04-27246-2E