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MB40D001 Datasheet, PDF (14/17 Pages) Fujitsu Component Limited. – D/A Converter for Digital Tuning
MB40D001
s DATA INPUT/OUTPUT TIMING (Serial Bus Format)
• Timing of D/A Converter Operation, I/O Expander Operation (serial to parallel conversion), and ESR Write
Operation.
SI
D0
D1
D2
CLK
1
2
3
DE
DF
15
16
CS
AO×
D××
SO
Data input is enabled at the fall of the CS signal. 16-bit data is input, and executed by shift register command
at the rise of CS.
In D/A converter operation, analog output selected at the rise of CS is converted. In serial to parallel conversion,
digital output selected at the rise of CS is converted. In ESR write operation, data is set in the ESR at the rise of
[CS] and used to change pin states.
• I/O Expander Operation (parallel to serial conversion)
SI
D0
DF
CLK
1
16
(Parallel to serial conversion command entered)
CS
1
2
16
D××
Parallel data loaded
SO
D0
DF
(Parallel to serial conversion result output)
Data input is enabled at the fall of the CS signal. 16-bit data (parallel to serial conversion command) is input,
and commands received at the rise of CS. At the fall of CS the data from parallel input is loaded in the shift register
from D4 to DF, and output from the SO pin timed to the fall of the CLK signal.
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