MB15F04 Datasheet, PDF (10/23 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F04
Table. 7 Phase Comparator Phase Switching Data Setting
FC = H
FC = L
fr > fp
H
L
fr = fp
Z
Z
fr < fp
L
H
VCO polarity
(1)
(2)
VCO Output
Frequency
Note: • Z = High–impedance
• Depending upon the VCO and LPF polarity,
FC bit should be set.
Table. 8 LD/fout Output Select Data Setting
LDS
LD/fout output signal
H
fout (frTX/RX, fpTX/RX) signals
L
LD signal
(1)
(2)
VCO Output Voltage
Serial Data Input Timing
1st. Data
Data
MSB
2nd. Data
Control bit Invalid data
LSB
Clock
t1
t2
t5
t0
t4
LE
t3
t6
On rising edge of the clock, one bit of the data is transferred into the shift register.
Parameter Min Typ Max Unit
Parameter Min Typ
t1
20
–
–
ns
t2
20
–
–
ns
t3
30
–
–
ns
t4
20
–
–
ns
t5
30
–
t6
100
–
t7
100
–
Max
–
–
–
Unit
ns
ns
ns
10