UMFT240XE Datasheet, PDF (6/18 Pages) Future Technology Devices International Ltd. – UMFT240XE USB to 8-bit 245 FIFO Development Module

UMFT240XE
Version 1.0
Document Reference No.: FT_000653 Clearance No.: FTDI# 295
4.3 CBUS Signal Options
The following options can be configured on the CBUS I/O pins. These options are all configured in the
internal MTP ROM using the utility software FT_PROG, which can be downloaded from the
www.ftdichip.com. The default configuration is described in Section 9.
CBUS Signal Available On CBUS Pin
Option
Description
Tristate
CBUS5, CBUS6
IO Pad is tri-stated
DRIVE_1
CBUS5, CBUS6
Output a constant 1
DRIVE_0
CBUS5, CBUS6
Output a constant 0
PWREN#
CBUS5, CBUS6
Output is low after the device has been configured by USB, then high
during USB suspend mode. This output can be used to control power to
external logic P-Channel logic level MOSFET switch.
NOTE: This function is driven by an open-drain to ground with no
internal pull-up, this is specially designed to aid battery charging
applications. UMFT240XE connects an on-board 47K pull-up on each
CBUS and DBUS signal.
TXLED#
CBUS5, CBUS6
Transmit data LED drive – open drain pulses low when transmitting data
via USB.
RXLED#
CBUS5, CBUS6
Receive data LED drive – open drain pulses low when receiving data via
USB.
TX&RXLED#
CBUS5, CBUS6
LED drive – open drain pulses low when transmitting or receiving data
via USB.
SLEEP#
CBUS5, CBUS6
Goes low during USB suspend mode. Typically used to power down an
external logic to RS232 level converter IC in USB to RS232 converter
designs. Deactivate SLEEP# option for when connected to a dedicated
charger port, this can be selected when configuring the MTP ROM. When
this option is enabled SLEEP# is driven high when FT240X is connected
to a Dedicated Charger Port.
CLK24MHz
CBUS5, CBUS6
24 MHz Clock output.**
CLK12MHz
CBUS5, CBUS6
12 MHz Clock output.**
CLK6MHz
CBUS5, CBUS6
6 MHz Clock output.**
BCD_Charger
CBUS5, CBUS6
Battery Charge Detect indicates when the device is connected to a
dedicated battery charger host. Active high output. NOTE: Requires a
10K pull-down to remove power up toggling.
BCD_Charger#
CBUS5, CBUS6
Active low BCD Charger, driven by an open drain to ground with no
internal pull-up (4.7K on board pull-up present).
BitBang_WR#
CBUS5, CBUS6
Synchronous and asynchronous bit bang mode WR# strobe output.
BitBang_RD#
CBUS5, CBUS6
Synchronous and asynchronous bit bang mode RD# strobe output.
VBUS Sense
CBUS5, CBUS6
Input to detect when VBUS is present.
Time Stamp
CBUS5, CBUS6
Toggle signal which changes state each time a USB SOF is received
Keep_Awake#
CBUS5, CBUS6
Table 4.2 – CBUS Signal Options
Active Low input, prevents the chip from going into suspend.
**When in USB suspend mode the outputs clocks are also suspended.
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