MC9328MX21S_08 Datasheet, PDF (8/88 Pages) Freescale Semiconductor, Inc – i.MX family of microprocessors 266 MHz

Signal Descriptions
Table 2. i.MX21S Signal Descriptions (Continued)
Signal Name
Function/Notes
External DMA
EXT_DMAREQ
EXT_DMAGRANT
External DMA Request input signal. This signal is multiplexed with CSPI1_RDY.
External DMA Grant output signal. This signal is multiplexed with LD[16] of LCDC and CSPI1_SS1 of
CSPI1.
NAND Flash Controller
NF_CLE
NF_CE
NF_WP
NF_ALE
NF_RE
NF_WE
NF_RB
NF_IO[15:0]
NAND Flash Command Latch Enable output signal. Multiplexed with PC_POE of PCMCIA.
NAND Flash Chip Enable output signal. This signal is multiplexed with PC_CE1 of PCMCIA.
NAND Flash Write Protect output signal. This signal is multiplexed with PC_CE2 of PCMCIA.
NAND Flash Address Latch Enable output signal. This signal is multiplexed with PC_OE of PCMCIA.
NAND Flash Read Enable output signal. This signal is multiplexed with PC_RW of PCMCIA.
NAND Flash Write Enable output signal. This signal is multiplexed with and PC_BVD2 of PCMCIA.
NAND Flash Ready Busy input signal. This signal is multiplexed with PC_RST of PCMCIA.
NAND Flash Data input and output signals. NF_IO[15:7] signals are multiplexed with A[25:21] and
A[15:13]. NF_IO[7:0] signals are multiplexed with several PCMCIA signals.
PCMCIA Controller
PC_A[25:0]
PC_D[15:0]
PC_CD1
PC_CD2
PC_WAIT
PC_READY
PC_RST
PC_OE
PC_WE
PC_VS1
PC_VS2
PC_BVD1
PC_BVD2
PC_SPKOUT
PC_REG
PC_CE1
PC_CE2
PC_IORD
PC_IOWR
PC_WP
PCMCIA Address signals. These signals are multiplexed with A[25:0].
PCMCIA Data input and output signals. These signals are multiplexed with D[15:0].
PCMCIA Card Detect1 input signal. This signal is multiplexed with NFIO[7] signal of NF.
PCMCIA Card Detect2 input signal. This signal is multiplexed with NFIO[6] signal of NF.
PCMCIA Wait input signal to extend current access. This signal is multiplexed with NFIO[5] signal of NF.
PCMCIA Ready input signal indicates card is ready for access. Multiplexed with NFIO[4] signal of NF.
PCMCIA Reset output signal. This signal is multiplexed with NFRB signal of NF.
PCMCIA Memory Read Enable output signal asserted during common or attribute memory read cycles.
This signal is multiplexed with NFALE signal of NF.
PCMCIA Memory Write Enable output signal asserted during common or attribute memory cycles. This
signal is shared with RW of the EIM.
PCMCIA Voltage Sense1 input signal. This signal is multiplexed with NFIO[2] signal of NF.
PCMCIA Voltage Sense2 input signal. This signal is multiplexed with NFIO[1] signal of NF.
PCMCIA Battery Voltage Detect1 input signal. This signal is multiplexed with NFIO[0] signal of NF.
PCMCIA Battery Voltage Detect2 input signal. This signal is multiplexed with NF_WE signal of NF.
PCMCIA Speaker Out output signal. This signal is multiplexed with PWMO signal.
PCMCIA Register Select output signal. This signal is shared with EB2 of EIM.
PCMCIA Card Enable1 output signal. This signal is multiplexed with NFCE signal of NF.
PCMCIA Card Enable2 output signal. This signal is multiplexed with NFWP signal of NF.
PCMCIA IO Read output signal. This signal is shared with EB3 of EIM.
PCMCIA IO Write output signal. This signal is shared with OE signal of EIM.
PCMCIA Write Protect input signal. This signal is multiplexed with NFIO[3] signal of NF.
MC9328MX21S Technical Data, Rev. 1.3
8
Freescale Semiconductor