MC9S12XEP100_10 Datasheet, PDF (706/1324 Pages) Freescale Semiconductor, Inc – HCS12X Microcontrollers

Chapter 19 Pulse-Width Modulator (S12PWM8B8CV1)
Duty Cycle = [PWMDTYx / PWMPERx] * 100%
For boundary case programming values, please refer to Section 19.4.2.8, “PWM Boundary Cases”.
Module Base + 0x001C = PWMDTY0, 0x001D = PWMDTY1, 0x001E = PWMDTY2, 0x001F = PWMDTY3
Module Base + 0x0020 = PWMDTY4, 0x0021 = PWMDTY5, 0x0022 = PWMDTY6, 0x0023 = PWMDTY7
7
6
5
4
3
2
1
0
R
Bit 7
6
5
4
3
2
1
Bit 0
W
Reset
1
1
1
1
1
1
1
1
Figure 19-16. PWM Channel Duty Registers (PWMDTYx)
Read: Anytime
Write: Anytime
19.3.2.15 PWM Shutdown Register (PWMSDN)
The PWMSDN register provides for the shutdown functionality of the PWM module in the emergency
cases. For proper operation, channel 7 must be driven to the active level for a minimum of two bus clocks.
Module Base + 0x0024
R
W
Reset
7
PWMIF
0
6
5
4
3
2
0
0
PWM7IN
PWMIE
PWMLVL
PWMRSTRT
0
0
0
0
0
= Unimplemented or Reserved
Figure 19-17. PWM Shutdown Register (PWMSDN)
Read: Anytime
Write: Anytime
1
PWM7INL
0
PWM7ENA
0
0
Field
Description
7
PWMIF
PWM Interrupt Flag — Any change from passive to asserted (active) state or from active to passive state will
be flagged by setting the PWMIF flag = 1. The flag is cleared by writing a logic 1 to it. Writing a 0 has no effect.
0 No change on PWM7IN input.
1 Change on PWM7IN input
6
PWMIE
PWM Interrupt Enable — If interrupt is enabled an interrupt to the CPU is asserted.
0 PWM interrupt is disabled.
1 PWM interrupt is enabled.
5
PWM Restart — The PWM can only be restarted if the PWM channel input 7 is de-asserted. After writing a logic
PWMRSTRT 1 to the PWMRSTRT bit (trigger event) the PWM channels start running after the corresponding counter passes
next “counter == 0” phase. Also, if the PWM7ENA bit is reset to 0, the PWM do not start before the counter
passes $00. The bit is always read as “0”.
MC9S12XE-Family Reference Manual , Rev. 1.21
706
Freescale Semiconductor
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