33661 Datasheet, PDF (7/21 Pages) Freescale Semiconductor, Inc – Local Area Network (LIN) Enhanced Physical Interface with Selectable Slew Rate

ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions 7.0 V ≤ V_SUP ≤ 18 V, - 40°C ≤ T_A ≤ 125°C, GND = 0 V unless otherwise noted. Typical
values noted reflect the approximate parameter means at T_A = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
LIN OUTPUT TIMING CHARACTERISTICS FOR NORMAL MODE
Dominant Propagation Delay Time TXD to LIN ⁽⁶⁾
Measurement Threshold (50% TXD to 58.1% V_SUP)
Measurement Threshold (50% TXD to 28.4% V_SUP)
Recessive Propagation Delay Time TXD to LIN ⁽⁶⁾
Measurement Threshold (50% TXD to 42.2% V_SUP)
Measurement Threshold (50% TXD to 74.4% V_SUP)
µs
t _DOM (MIN)
—
—
50
t _DOM (MAX)
—
—
50
µs
t _REC (MIN)
—
—
50
t _REC (MAX)
—
—
50
Propagation Delay Time Symmetry
t _DOM (MIN) to t _REC (MAX)
t _DOM (MAX) to t _REC (MIN)
µs
dt₁
- 10.44
—
dt₂
- 10.44
—
8.12
8.12
LIN OUTPUT TIMING CHARACTERISTICS FOR SLOW MODE
Dominant Propagation Delay Time TXD to LIN ⁽⁶⁾
Measurement Threshold (50% TXD to 61.6% V_SUP)
Measurement Threshold (50% TXD to 25.1% V_SUP)
Recessive Propagation Delay Time TXD to LIN ⁽⁶⁾
Measurement Threshold (50% TXD to 38.9% V_SUP)
Measurement Threshold (50% TXD to 77.8% V_SUP)
t _DOM (MIN)
—
t _DOM (MAX)
—
t _REC (MIN)
—
t _REC (MAX)
—
µs
—
100
—
100
µs
—
100
—
100
Propagation Delay Time Symmetry
t _DOM (MIN) to t _REC (MAX)
t _DOM (MAX) to t _REC (MIN)
µs
dt_1S
- 21.88
—
dt _2S
- 21.88
—
17.44
17.44
LIN OUTPUT DRIVER FAST MODE
LIN Fast Slew Rate (Programming Mode)
Fast Slew Rate
dv/dt fast
V/µs
—
15
—
LIN PIN
Overcurrent Shutdown Delay Time ⁽⁷⁾
LIN RECEIVER CHARACTERISTICS
Receiver Dominant Propagation Delay Time ⁽⁸⁾
LIN LOW to RXD LOW
Receiver Recessive Propagation Delay Time ⁽⁸⁾
LIN HIGH to RXD HIGH
t _OV-DELAY
—
10
—
µs
t _RL
µs
—
3.5
6.0
t _RH
µs
—
3.5
6.0
Receiver Propagation Delay Time Symmetry
t _RL - t _RH
t _R-SYM
µs
- 2.0
—
2.0
Notes
6 7.0 V ≤ V_SUP ≤ 18 V. Bus load R₀ and C₀: 1.0 nF/1.0 kΩ, 6.8 nF/660 Ω, 10 nF/500 Ω.
7 This parameter is guaranteed by design; however, it is not production tested.
8 Measured between LIN signal threshold V_LINL or V_LINH and 50% of RXD signal.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33661
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