56F8365_07 Datasheet, PDF(65/172 Page) Freescale Semiconductor, Inc

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56F8365_07 Datasheet, PDF (65/172 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

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Peripheral Memory Mapped Registers

Table 4-29 GPIOA Registers Address Map

(GPIOA_BASE = $00 F2E0)

GPIOA_PUR

Address Offset

Pull-up Enable Register

GPIOA_DR

Data Register

GPIOA_DDR

Data Direction Register

GPIOA_PER

Peripheral Enable Register

GPIOA_IAR

Interrupt Assert Register

GPIOA_IENR

Interrupt Enable Register

GPIOA_IPOLR

Interrupt Polarity Register

GPIOA_IPR

Interrupt Pending Register

GPIOA_IESR

Interrupt Edge-Sensitive Register

GPIOA_PPMODE

Push-Pull Mode Register

GPIOA_RAWDATA

Raw Data Input Register

Reset Value

0 x 3FFF

0 x 0000

0 x 3FFF

0 x 0000

0 x 3FFF

Table 4-30 GPIOB Registers Address Map

(GPIOB_BASE = $00 F300)

GPIOB_PUR

GPIOB_DR

GPIOB_DDR

GPIOB_PER

GPIOB_IAR

GPIOB_IENR

GPIOB_IPOLR

GPIOB_IPR

GPIOB_IESR

GPIOB_PPMODE

GPIOB_RAWDATA

Pull-up Enable Register

Data Register

Data Direction Register

Peripheral Enable Register

Interrupt Assert Register

Interrupt Enable Register

Interrupt Polarity Register

Interrupt Pending Register

Interrupt Edge-Sensitive Register

Push-Pull Mode Register

Raw Data Input Register

Reset Value

0 x 00FF

0 x 0000

0 x 00FF

Table 4-31 GPIOC Registers Address Map

(GPIOC_BASE = $00 F310)

GPIOC_PUR

Pull-up Enable Register

Reset Value

0 x 07FF

56F8365 Technical Data, Rev. 7

Freescale Semiconductor

Preliminary

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