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56F8365_07 Datasheet, PDF (166/172 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers
Part 11 Packaging
11.1 56F8365 Package and Pin-Out Information
This section contains package and pin-out information for the 56F8365. This device comes in a 128-pin
Low-profile Quad Flat Pack (LQFP). Figure 11-1. shows the package outline for the 128-pin LQFP;
Figure 11-3 shows the mechanical parameters for this package, and Table 11-1. lists the pin-out for the
128-pin LQFP.
INDEX0
HOME0
VSS
VDD_IO
VPP2
CLKO
TXD0
RXD0
PHASEA1
PHASEB1
INDEX1
HOME1
VCAP4
VDD_IO
GPIOA0
GPIOA1
GPIOA2
GPIOA3
GPIOA4
GPIOA5
VSS
GPIOF0
GPIOF1
GPIOF2
VDD_IO
GPIOF3
GPIOB0
GPIOB1
GPIOB2
GPIOB3
GPIOB4
PWMB0
PWMB1
PWMB2
VSS
VDD_IO
PWMB3
PWMB4
PIN 1
Orientation
Mark
39
103
65
ANB6
ANB5
ANB4
ANB3
ANB2
ANB1
ANB0
VSSA_ADC
VDDA_ADC
VREFH
VREFP
VREFMID
VREFN
VREFLO
TEMP_SENSE
ANA7
ANA6
ANA5
ANA4
ANA3
ANA2
ANA1
ANA0
CLKMODE
RESET
RSTO
VDD_IO
VCAP3
EXTAL
XTAL
VDDA_OSC_PLL
OCR_DIS
FAULTA3
FAULTA2
FAULTA1
FAULTA0
PWMA5
VSS
Figure 11-1 Top View, 56F8365 128-pin LQFP Package
56F8365 Technical Data, Rev. 7
166
Freescale Semiconductor
Preliminary