MC33927 Datasheet, PDF (6/44 Pages) Freescale Semiconductor, Inc – Three-Phase Field Effect Transistor Pre-Driver

ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings
All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or
permanent damage to the device.
Ratings
Symbol
Value
Unit
ELECTRICAL RATINGS
VBAT Supply Voltage
Normal Operation (Steady-State)
Transient Survival⁽¹⁾
V_BAT
V
58
-1.5 to 80
VPWR Supply Voltage
Normal Operation (Steady-State)
Transient Survival⁽¹⁾
V_PWR
V
58
-1.5 to 80
Charge Pump (PUMP, VPUMP)
V_PUMP
-0.3 to 40
V
VLS Regulator Outputs (VLS_, VLS_CAP)
V_LS
-0.3 to 18
V
Logic Supply Voltage
Logic Output (INT, SO, PHASEA, PHASEB, PHASEC, OC_OUT)⁽²⁾
V_DD
-0.3 to 7.0
V
V_OUT
-0.3 to 7.0
V
Logic Input Pin Voltage (EN1, EN2, Px_HS, Px_LS, SI, SCLK, CS, RST) 10mA
V_IN
-0.3 to 7.0
V
Amplifier Input Voltage
V_{IN_A}
V
(Both Inputs-GND), (AMP_P - GND) or (AMP_N - GND) 6mA source or sink
-7.0 to 10.0
Over-current comparator threshold 10mA
Driver Output Voltage⁽³⁾
High-Side bootstrap (PA_BOOT, PB_BOOT, PC_BOOT)
High-Side (PA_HS_G, PB_HS_G, PC_HS_G)
Low-Side (PA_LS_G, PB_LS_G, PC_LS_G)
V_OC
-0.3 to 7.0
V
V
V_BOOT
75
V_{HS_G}
75
V_{LS_G}
16
Driver Voltage Transient Survival
V
High-Side (PA_HS_G, PB_HS_G, PC_HS_G, PA_HS_S, PB_HS_S,
V_{HS_G}
-7.0
PC_HS_S)
Low-Side (PA_LS_G, PB_LS_G, PC_LS_G, PGNDA, PGNDB, PGNDC)
V_{HS_S}
-7.0
V_{LS_G}
-7.0
V_PGND
-7.0
Continuous Output Current
I_GATE
-0.1 to 0.1
A
ESD Voltage⁽⁴⁾
V_ESD
V
Human Body Model - HBM (All pins except for the pins listed below)
Pins: PA_Boot, PA_HS_S, PA_HS_G, PB_Boot, PB_HS_S,
PB_HS_G, PC_Boot, PC_HS_S, PC_HS_G, VPWR
±2000
±1000
Charge Device Model - CDM
±750
Notes
1. The device will withstand load dump transient as defined by ISO7637 with peak voltage of 80V.
2. Short-circuit proof, the device will not be damaged or induce unexpected behavior due to shorts to external sources within this range.
3. This voltage should not be applied without also taking voltage at HS_S and voltage at PGND_x into account.
4. ESD testing is performed in accordance with the Human Body Model (HBM) (C_ZAP = 100pF, R_ZAP = 1500Ω) and the Charge Device
Model (CDM), Robotic (C_ZAP = 4.0pF).
33927
6
Analog Integrated Circuit Device Data
Freescale Semiconductor