K10P100M72SF1 Datasheet, PDF (58/73 Pages) Freescale Semiconductor, Inc – K10 Sub-Family

Peripheral operating requirements and behaviors
Table 40. Slave mode DSPI timing (full voltage range)
Num
DS9
DS10
DS11
DS12
DS13
DS14
DS15
DS16
Operating voltage
Description
Frequency of operation
DSPI_SCK input cycle time
DSPI_SCK input high/low time
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSPI_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
Min.
1.71
—
8 x t_BUS
(t_SCK/2) - 4
—
0
2
7
—
—
Max.
3.6
6.25
—
(t_SCK/2) + 4
20
—
—
—
19
19
Unit
V
MHz
ns
ns
ns
ns
ns
ns
ns
ns
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
DS10
DS15
DS13
First data
DS14
First data
DS12
Data
Data
DS9
DS11
Last data
DS16
Last data
Figure 24. DSPI classic SPI timing — slave mode
6.8.4 _I²_{C switching specifications}
See General switching specifications.
6.8.5 UART switching specifications
See General switching specifications.
K10 Sub-Family Data Sheet, Rev. 2, 4/2012.
58
Freescale Semiconductor, Inc.