56F8037_07 Datasheet, PDF (57/180 Pages) Freescale Semiconductor, Inc – 16-bit Digital Signal Controllers

Peripheral Memory-Mapped Registers
Table 4-17 GPIOB Registers Address Map
(GPIOB_BASE = $00 F160)
Register Acronym
Address Offset
Register Description
GPIOB_PUPEN
GPIOB_DATA
GPIOB_DDIR
GPIOB_PEREN
GPIOB_IASSRT
GPIOB_IEN
GPIOB_IPOL
GPIOB_IPEND
GPIOB_IEDGE
GPIOB_PPOUTM
GPIOB_RDATA
GPIOB_DRIVE
$0
Pull-up Enable Register
$1
Data Register
$2
Data Direction Register
$3
Peripheral Enable Register
$4
Interrupt Assert Register
$5
Interrupt Enable Register
$6
Interrupt Polarity Register
$7
Interrupt Pending Register
$8
Interrupt Edge-Sensitive Register
$9
Push-Pull Output Mode Control Register
$A
Raw Data Input Register
$B
Output Drive Strength Control Register
Table 4-18 GPIOC Registers Address Map
(GPIOC_BASE = $00 F170)
Register Acronym
Address Offset
Register Description
GPIOC_PUPEN
GPIOC_DATA
GPIOC_DDIR
GPIOC_PEREN
GPIOC_IASSRT
GPIOC_IEN
GPIOC_IPOL
GPIOC_IPEND
GPIOC_IEDGE
GPIOC_PPOUTM
GPIOC_RDATA
GPIOC_DRIVE
$0
Pull-up Enable Register
$1
Data Register
$2
Data Direction Register
$3
Peripheral Enable Register
$4
Interrupt Assert Register
$5
Interrupt Enable Register
$6
Interrupt Polarity Register
$7
Interrupt Pending Register
$8
Interrupt Edge-Sensitive Register
$9
Push-Pull Output Mode Control Register
$A
Raw Data Input Register
$B
Output Drive Strength Control Register
56F8037 Data Sheet, Rev. 3
Freescale Semiconductor
57
Preliminary