56F8356 Datasheet, PDF (56/176 Pages) Motorola, Inc – 56F8356 16-bit Hybrid Controller

Table 4-13 Quad Timer C Registers Address Map
(TMRC_BASE = $00 F0C0)
Register Acronym Address Offset
Register Description
TMRC0_CMP1
TMRC0_CMP2
TMRC0_CAP
TMRC0_LOAD
TMRC0_HOLD
TMRC0_CNTR
TMRC0_CTRL
TMRC0_SCR
TMRC0_CMPLD1
TMRC0_CMPLD2
TMRC0_COMSCR
TMRC1_CMP1
TMRC1_CMP2
TMRC1_CAP
TMRC1_LOAD
TMRC1_HOLD
TMRC1_CNTR
TMRC1_CTRL
TMRC1_SCR
TMRC1_CMPLD1
TMRC1_CMPLD2
TMRC1_COMSCR
TMRC2_CMP1
TMRC2_CMP2
TMRC2_CAP
TMRC2_LOAD
TMRC2_HOLD
TMRC2_CNTR
TMRC2_CTRL
$0
Compare Register 1
$1
Compare Register 2
$2
Capture Register
$3
Load Register
$4
Hold Register
$5
Counter Register
$6
Control Register
$7
Status and Control Register
$8
Comparator Load Register 1
$9
Comparator Load Register 2
$A
Comparator Status and Control Register
Reserved
$10
Compare Register 1
$11
Compare Register 2
$12
Capture Register
$13
Load Register
$14
Hold Register
$15
Counter Register
$16
Control Register
$17
Status and Control Register
$18
Comparator Load Register 1
$19
Comparator Load Register 2
$1A
Comparator Status and Control Register
Reserved
$20
Compare Register 1
$21
Compare Register 2
$22
Capture Register
$23
Load Register
$24
Hold Register
$25
Counter Register
$26
Control Register
56F8356 Technical Data, Rev. 13
56
Freescale Semiconductor
Preliminary