MCF53017 Datasheet, PDF (39/62 Pages) Freescale Semiconductor, Inc – Version 3 ColdFire® core with EMAC

Preliminary Electrical Characteristics
MDC (Output)
MDIO (Output)
E10
E11
E11
E12
E13
Valid Data
MDIO (Input)
E14
E15
Valid Data
Figure 26. MII Serial Management Channel TIming Diagram
5.14 32-Bit Timer Module Timing Specifications
Table 25 lists timer module AC timings.
Table 25. Timer Module AC Timing Specifications
Name
T1
T2
Characteristic
DT0IN / DT1IN / DT2IN / DT3IN cycle time
DT0IN / DT1IN / DT2IN / DT3IN pulse width
Min
Max
Unit
3
—
t_CYC
1
—
t_CYC
5.15 DSPI Timing Specifications
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with both master and slave operations. Many
of the transfer attributes are programmable. Table 26 provides DSPI timing characteristics for classic SPI timing modes. Refer
to the DSPI chapter of the MCF5301x Reference Manual for information on the modified transfer formats used for
communicating with slower peripheral devices.
Table 26. DSPI Module AC Timing Specifications¹
Name
Characteristic
DS1 DSPI_SCK Cycle Time
DS2 DSPI_SCK Duty Cycle
Master Mode
DS3 DSPI_PCSn to DSPI_SCK delay
DS4 DSPI_SCK to DSPI_PCSn delay
DS5 DSPI_SCK to DSPI_SOUT valid
DS6 DSPI_SCK to DSPI_SOUT invalid
DS7 DSPI_SIN to DSPI_SCK input setup
DS8 DSPI_SCK to DSPI_SIN input hold
Slave Mode
DS9 DSPI_SCK to DSPI_SOUT valid
Symbol
Min
Max
t_SCK
4 x t_SYS
—
— (tsck ÷ 2) – 2.0 (tsck ÷ 2) + 2.0
Unit
ns
ns
Notes
2
3
t_CSC (2 × t_SYS) – 1.5
—
t_ASC (2 × t_SYS) – 3.0
—
—
—
5
—
–5
—
—
9
—
—
0
—
ns
4
ns
5
ns
ns
ns
ns
—
—
4
ns
MCF5301x Data Sheet, Rev. 3
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
39