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34704_09 Datasheet, PDF (39/49 Pages) Freescale Semiconductor, Inc – Multiple Channel DC-DC Power Management IC
FUNCTIONAL DEVICE OPERATION
COMPONENT CALCULATION
Compensating for boost operation:
• L: A boost power stage can be designed to operate in
CCM for load currents above a certain level usually 5 to
15% of full load. The minimum value of inductor to
maintain CCM can be determined by using the following
procedure:
1. Define IOB as the minimum current to maintain CCM as
15% of full load:
Lm
i
n
≥
V-----o----(--D-----)--(--1-----–-----D----)--2---T--
2IOB
[H]
However the worst case condition for the boost power
stage is when the input voltage is equal to one half of the
output voltage, which results in the Maximum ΔIL, then:
Lmin
≥
V-----o----(--T----)
16IOB
[H]
• COUT: The three elements of output capacitor that
contribute to its impedance and output voltage ripple are
the ESR, the ESL and the capacitance C. The minimum
capacitor value is approximately:
COUT
≥
I---o---m----a--x---D-----m----a--x-
FswΔVor
[F]
• Where ΔVOr is the desired output voltage ripple.
• Now calculate the maximum allowed ESR to reach the
desired ΔVOr:
ESR ≤ ---------------Δ-----V----o---r---------------
⎛
⎝
----I---o---m----a--x-----
1 – Dmax
+
IO
⎞
B⎠
[Ω]
• R1 and RB:
These two resistors help to set the output voltage to the
desire value using a Vref=0.6V, select R1 between 10k and
100K and then calculate RB as follows:
RB = --------R-----1---------
----V----o----- – 1
[Ω]
VREF
• Compensation network. (C1,C2,C3, R2, R3)
For compensating a buck converter, 4 important
frequencies referring to the plant are:
1. Output LC filter cutoff frequency (FLC):
FLC = ------D-----′--m----i-n-------
[Hz]
2π LCOUT
• Where D’min is the minimum off time percentage given
by:
D′min
=
---V----i--n---m----i--n---
Voutmax
2. Cutoff frequency due to capacitor ESR:
FESR
=
------------------1-------------------
2π(COUT)ESR
[Hz]
3. The right plane zero frequency:
RHPZ = (---D-----′-m----i--n2---)-π-2--L-R----L---O----A----D-
[Hz]
4. Crossover frequency (or bandwidth): select this
frequency as far away form the RHPZ as much as
possible:
FBW
«
R-----H-----P---Z-
6
[Hz]
The Type 3 external compensation network will be in
charge of canceling some of these poles and zeros to
achieve stability in the system. The following poles and
zeroes frequencies are provided by the type 3 compensation:
FPO = FBW
FP1 = FESR
FZ1 = 0.9FLC
F2P
=
F----S---W---
2
F22 = 1.1FLC
Analog Integrated Circuit Device Data
Freescale Semiconductor
34704
39