34704_09 Datasheet, PDF (36/49 Pages) Freescale Semiconductor, Inc – Multiple Channel DC-DC Power Management IC

FUNCTIONAL DEVICE OPERATION
COMPONENT CALCULATION
COMPONENT CALCULATION
F_SW1 AND GENERAL SOFT START
CONFIGURATION
The 34704 uses F_SW1 as the switching frequency for
REG1(VG) thru REG5, and this can be changed by applying
a voltage between 0 to 2.5V to the FREQ pin. If the FREQ pin
is left unconnected, the 34704 starts up with a default
frequency of 750KHz. To configure the F_SW1, use a 2
resistors voltage divider from VDDI to ground to set the
voltage on the FREQ pin as indicated bellow:
Ratio
F_SW1
[KHz]
RSS1
V_SS
RSS2
VDDI
V_SS
=
V_D
D
I
⎛
⎝
R-----S----S--R-1---S--+--S---R-2---S----S---2--^⎠⎞
RSS1, RSS2 tolerance ±1.0%
SS
GND
REGULATORS POWER STAGE AND
COMPENSATION CALCULATION
0
750
9/32
1000
13/32
1250
17/32
1500
21/32
1750
VDDI
2000
1. If an external voltage is used, F_SW1 can only be set during
device startup.
RF1
V_FREQ
RF2
VDDI
FREQ
GND
V_FREQ
=
V_DDI
⎛
⎝
R-----F----1R----+-F---2-R----F----2- ^⎠⎞
RF1, RF2 tolerance ±1.0%
Initially at power up, the soft start time will be set for all of
the regulators through programming the SS pin with an
external resistor divider connected between VDDI and AGND
as follows:
Ratio
Soft Start timing
[ms]
0
0.5
11/32
2.0
19/32
8.0
VDDI
32.0
I_DD max = 100μΑ
Regulator 1 and 6 (Synchronous Boost - internally
compensated - REG1 is VG supply).
REG1 is a Synchronous Boost converter set to 5V and
Maximum current of 500mA while REG6 is set to 15V at
60ma(on the 34704B, REG1 does not exist but similar
circuitry is used to provide the internal VG voltage). They do
not need an external compensation network, thus, the only
components that need to be calculated are:
• L: A boost power stage can be designed to operate in
CCM for load currents above a certain level usually 5 to
15% of full load. The minimum value of inductor to
maintain CCM can be determined by using the following
procedure:
1. Define I_OB as the minimum current to maintain CCM as
15% of full load.
L_m
i
n
≥
V-----o----(_--D-----)_--(_{--1-----–-----D----})_---²_--T--
2I_OB
(H)
2. However the worst case condition for the boost power
stage is when the input voltage is equal to one half of
the output voltage, which results in the Maximum ΔI_L,
then:
L_min
≥
V-----o----(_--T----)
16I_OB
(H)
Note: On the 34704B Use the recommended 3.0uH
inductor rated between 50 to 100mA in order to have this
regulator working in DCM. Rising the inductor value will make
the regulator to begin working in CCM.
• C_OUT: The three elements of output capacitor that
contribute to its impedance and output voltage ripple are
the ESR, the ESL and the capacitance C. The minimum
capacitor value is approximately:
C_OUT ≥ ^I--F-o---sm---w-^a--^x-_Δ--D--V---^m--o--^a-_r-^x-
(F)
• Where ΔVO_r is the desired output voltage ripple.
34704
36
Analog Integrated Circuit Device Data
Freescale Semiconductor