34704_09 Datasheet, PDF (31/49 Pages) Freescale Semiconductor, Inc – Multiple Channel DC-DC Power Management IC

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
OV/UV Response
bit
A (Default)
0
B
1
Dynamic Voltage Scaling for each regulator
The customer can adjust each regulator’s output
dynamically with 2.5% step size. The total range of
adjustability will vary depending on each regulator to
accommodate different operating environments. Some
regulators will utilize the full range of -20.00% to +17.50%
and some regulators will only use the range of ±10.00%. For
details, see each regulator’s section. Each 2.5% step takes
50μs before moving to the next step. REG8 only performs
DVS when in voltage regulation mode.
During DVS, the Over-voltage and Under-voltage
monitoring will not be active. In addition to that, these faults
will be masked and not active for a DVS settling time period
equal to 1ms. This DVS settling time will start after the
DVSSTAT register is flagged indicating that the DVS cycle is
done. This is to ensure that during DVS and soft start alike
the output will not be tripped due to a momentary over-
voltage or under-voltage fault. This is the same for Response
A and Response B of the over-voltage/under-voltage fault
monitoring.
34704 assigns a 4-bit register to program the Dynamic
Voltage Scaling for each regulator (DVSSETx Register)
where x corresponds to each regulator.
Percentage Change MSB
0.00% (Default)
0
0
+2.50%
0
0
+5.00%
0
0
+7.50%
0
0
+10.00%
0
1
+12.50%
0
1
+15.00%
0
1
+17.50%
0
1
-20.00%
1
0
-17.50%
1
0
-15.00%
1
0
-12.50%
1
0
-10.00%
1
1
-7.50%
1
1
-5.00%
1
1
-2.50%
1
1
LSB
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
On/Off Control for each group of regulators as defined
previously and for the whole IC
34704 assigns a 1-bit register for each group to turn each
group on/off (ONOFFA, C, D, or E register). Please note that
GrpB does not have a dedicated enable register which is
enabled by default.
GrpA, C, D, or E ONOFF
bit
OFF (Default)
0
ON
1
Also, 34704 assigns a 1-bit register for disabling the whole
IC through the I²C. (ALLOFF register)
ALL OFF
bit
False (Default)
0
True
1
Soft Start Time
There are two registers for setting the soft start value for
all of the regulators except REG1. The SSTIME register
reads the soft start value set by the SS pin and is used to
initially set the soft start value for all of the regulators except
REG1. Then, the SSSET registers for REG5 through REG8
can be used to change the soft start value for these
regulators from the value set by the SSTIME register.
Here is how the SSTIME register interacts with the
SSSETx register:
1. SSTIME register is set by a value read through the SS
pin.
2. SSTIME register is copied into the registers SSSET5,
SSSET6, SSSET7, and SSSET8.
3. The soft start time of REG2, REG3, and REG4 are only
affected by the value of SSTIME register.
4. The soft start time of REG5, REG6, REG7, and REG8
are affected by the value of registers SSSET5,
SSSET6, SSSET7, and SSSET8 respectively.
34704 assigns a 2-bit register to store the value
programmed by the SS pin. The register is called SSTIME
And can only be read by the user.
Soft Start
MSB LSB
0.5ms
0
0
2ms
0
1
8ms
1
0
32ms
1
1
34704 assigns a 2-bit register for REG5 through REG8 to
program the soft start times for these regulators (SSSETx
register) where x corresponds to each regulator from REG5
through REG8.
Analog Integrated Circuit Device Data
Freescale Semiconductor
34704
31