MC9S08QE128_08 Datasheet, PDF (36/50 Pages) Freescale Semiconductor, Inc – 8-Bit HCS08 Central Processor Unit (CPU)

Package Information
4X
0.20 (0.008) H L–M N
4X 20 TIPS
0.20 (0.008) T L–M N
–X–
X= L, M, N
P
80
1
61
60
CL
AB
–M–
BV
AB
G
VIEW Y
PLATING
–L–
3X VIEW Y
20
21
A1
–N–
B1 ^V1
41
40
ÍÍÇÇÍÍÇÇÍÍÇÇÍÍ ^F
J
BASE
METAL
D
U
0.13 (0.005) M T L–M S N S
S1
A
SECTION AB–AB
ROTATED 90 CLOCKWISE
S
C
–H–
–T–
SEATING
PLANE
8X 2
0.10 (0.004) T
VIEW AA
(W)
C2
0.05 (0.002) S
1
2X R R1
(K)
C1
E
(Z)
VIEW AA
0.25 (0.010)
GAGE
PLANE
DATE 09/21/95
CASE 917A-02
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DATUMS –L–, –M– AND –N– TO BE DETERMINED
AT DATUM PLANE –H–.
5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE –T–.
6. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS
0.250 (0.010) PER SIDE. DIMENSIONS A AND B
DO INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –H–.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. DAMBAR PROTRUSION SHALL
NOT CAUSE THE LEAD WIDTH TO EXCEED 0.460
(0.018). MINIMUM SPACE BETWEEN
PROTRUSION AND ADJACENT LEAD OR
PROTRUSION 0.07 (0.003).
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 14.00 BSC
0.551 BSC
A1 7.00 BSC
0.276 BSC
B 14.00 BSC
0.551 BSC
B1 7.00 BSC
0.276 BSC
C ––– 1.60 ––– 0.063
C1 0.04 0.24 0.002 0.009
C2 1.30 1.50 0.051 0.059
D 0.22 0.38 0.009 0.015
E 0.40 0.75 0.016 0.030
F 0.17 0.33 0.007 0.013
G
0.65 BSC
0.026 BSC
J 0.09 0.27 0.004 0.011
K
0.50 REF
0.020 REF
P 0.325 BSC
0.013 REF
R1 0.10 0.20 0.004 0.008
S 16.00 BSC
0.630 BSC
S1 8.00 BSC
0.315 BSC
U 0.09 0.16 0.004 0.006
V 16.00 BSC
0.630 BSC
V1
8.00 BSC
0.315 BSC
W
0.20 REF
0.008 REF
Z
1.00 REF
0.039 REF
0
0
10
0
10
01
0
–––
0
–––
02
9
14
9
14
Figure 26. 80-pin LQFP Package Drawing (Case 917A, Doc #98ASS23237W)
MC9S08QE128 Series Data Sheet, Rev. 7
36
Freescale Semiconductor