MC68HC908QY4A_10 Datasheet, PDF (35/200 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

FLASH Memory (FLASH)
2.6.7 EEPROM Memory Emulation Using FLASH Memory
In some applications, the user may want to repeatedly store and read a set of data from an area of
nonvolatile memory. This is easily implemented in EEPROM memory because single byte erase is
allowed in EEPROM.
When using FLASH memory, the minimum erase size is a page. However, the FLASH can be used as
EEPROM memory. This technique is called “EEPROM emulation”.
The basic concept of EEPROM emulation using FLASH is that a page is continuously programmed with
a new data set without erasing the previously programmed locations. Once the whole page is completely
programmed or the page does not have enough bytes to program a new data set, the user software
automatically erases the page and then programs a new data set in the erased page.
In EEPROM emulation when data is read from the page, the user software must find the latest data set
in the page since the previous data still remains in the same page. There are many ways to monitor the
page erase timing and the latest data set. One example is unprogrammed FLASH bytes are detected by
checking programmed bytes (non-$FF value) in a page. In this way, the end of the data set will contain
unprogrammed data ($FF value).
A couple of application notes, describing how to emulate EEPROM using FLASH, are available on our
web site. Titles and order numbers for these application notes are given at the end of this subsection.
For EEPROM emulation software to work successfully, the following items must be taken care of in the
user software:
1. Each FLASH byte in a page must be programmed only one time until the page is erased.
2. A page must be erased before the FLASH cumulative program HV period (t_HV) is beyond the
maximum t_HV. t_HV is defined as the cumulative high-voltage programming time to the same row
before the next erase. For more detailed information, refer to 16.15 Memory Characteristics.
3. FLASH row erase and program cycles should not exceed 10,000 cycles, respectively.
The above EEPROM emulation software can be easily developed by using the on-chip FLASH routines
implemented in the MCU. These routines are located in the ROM memory and support FLASH program
and erase operations. Proper utilization of the on-chip FLASH routines guarantee conformance to the
FLASH specifications.
In the on-chip FLASH programming routine called PRGRNGE, the high-voltage programming time is
enabled for less than 125 μs when programming a single byte at any operating bus frequency between
1.0 MHz and 8.4 MHz. Therefore, even when a row is programmed by 32 separate single-byte
programming operations, t_HV is less than the maximum t_HV. Hence, item 2 listed above is already taken
care of by using this routine.
A page erased operation is provided in the FLASH erase routine called ERARNGE.
Application note AN2635 (On-Chip FLASH Programming Routines) describes how to use these routines.
The following application notes, available at www.freescale.com, describe how EERPOM emulation is
implemented using FLASH:
AN2183 — Using FLASH as EEPROM on the MC68HC908GP32
AN2346 — EEPROM Emulation Using FLASH in MC68HC908QY/QT MCUs
AN2690 — Low Frequency EEPROM Emulation on the MC68HC908QY4
An EEPROM emulation driver, available at www.freescale.com, has been developed and qualified:
AN3040 — M68HC08 EEPROM Emulation Driver
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
Freescale Semiconductor
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