MC9S08SH8CTG Datasheet, PDF (33/341 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 2 Pins and Connections
Table 2-1. Pin Availability by Package Pin-Count
Pin Number
Lowest
Priority
Highest
24-pin 20-pin 16-pin 8-pin Port Pin
Alt 1
Alt 2
Alt 3
Alt 4
Alt5
1
3
3
3
2
—
—
—
3
4
4
4
4
5
5
— PTB7
SCL¹
EXTAL
5
6
6
— PTB6
SDA¹
XTAL
6
7
7
— PTB5
TPM1CH1² SS
PTC0³
7
8
8
— PTB4
TPM2CH1 MISO
PTC0³
8
9
—
— PTC3
PTC0³
ADP11
9
10
—
— PTC2
PTC0³
ADP10
10
11
—
— PTC1
TPM1CH1² PTC0³
ADP9
11
12
—
— PTC0
TPM1CH0² PTC0³
ADP8
12
13
9
— PTB3
PIB3
MOSI
PTC0³
ADP7
13
14
10
— PTB2
PIB2
SPSCK
PTC0³
ADP6
14
15
11
— PTB1
PIB1
TxD
ADP5
15
16
12
16
17
13
17
18
14
18
19
15
19
20
16
— PTB0
5 PTA3
6 PTA2
7 PTA1
8 PTA0
PIB0
PIA3
PIA2
PIA1
PIA0
RxD
SCL¹
SDA¹
TPM2CH0
TPM1CH0²
ADP4
ADP3
ADP2
ADP1⁴
ADP0⁴
20
—
—
—
21
—
—
—
22
—
—
—
23
1
1
1 PTA5⁵
IRQ
TCLK
24
2
2
2 PTA4
ACMPO
BKGD
1 _{IIC pins can be repositioned using IICPS in SOPT2, default reset locations are on PTA2 and PTA3.}
V_DD
V_SS
ACMP–⁴
ACMP+⁴
RESET
MS
2 _{TPM1CHx pins can be repositioned using TPM1PS in SOPT2, default reset locations are on PTA0 and PTB5.}
3 _{This port pin is part of the ganged output feature. When pin is enabled for ganged output, it will have priority over}
all digital modules. The output data, drive strength and slew-rate control of this port pin will follow the configuration
for the PTC0 pin, even in 16-pin packages where PTC0 doesn’t bond out. Ganged output not available in 8-pin
packages.
4 _{If ACMP and ADC are both enabled, both will have access to the pin.}
5 _{Pin is open-drain when configured as output driving high. Pin does not contain a clamp diode to VDD and should}
not be driven above V_DD. The voltage measured on the internally pulled up RESET will not be pulled to V_DD. The
internal gates connected to this pin are pulled to V_DD.
MC9S08SH8 MCU Series Data Sheet, Rev. 3
Freescale Semiconductor
29