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MC9S08SH8CTG Datasheet, PDF (299/341 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers
Appendix A Electrical Characteristics
Table A-6. DC Characteristics (continued)
Num C
Characteristic
Symbol
15 D POR re-arm voltage8
16 D POR re-arm time9
VPOR
tPOR
P Low-voltage detection threshold —
17
high range
VDD falling
VDD rising
VLVD1
P Low-voltage detection threshold —
18
low range
VDD falling
VDD rising
VLVD0
P Low-voltage warning threshold —
19
high range 1
VDD falling
VDD rising
VLVW3
P Low-voltage warning threshold —
20
high range 0
VDD falling
VDD rising
VLVW2
P Low-voltage warning threshold
21
low range 1
VDD falling
VDD rising
VLVW1
P Low-voltage warning threshold —
22
low range 0
VDD falling
VDD rising
VLVW0
T Low-voltage inhibit reset/recover
23
hysteresis
Vhys
24 P Bandgap Voltage Reference10
VBG
Condition
.
5V
3V
Min
Typ1
Max Unit
0.9
1.4
2.0
V
10
—
—
μs
3.9
4.0
4.1
V
4.0
4.1
4.2
2.48
2.56
2.64
V
2.54
2.62
2.70
4.5
4.6
4.7
V
4.6
4.7
4.8
4.2
4.3
4.4
V
4.3
4.4
4.5
2.84
2.92
3.00
V
2.90
2.98
3.06
2.66
2.74
2.82
V
2.72
2.80
2.88
—
100
—
mV
—
60
—
1.18
1.20
1.21
V
1 Typical values are measured at 25°C. Characterized, not tested.
2 When IRQ or a pin interrupt is configured to detect rising edges, pulldown resistors are used in place of pullup resistors.
3 The specified resistor value is the actual value internal to the device. The pullup value may measure higher when measured
externally on the pin.
4 Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum current
conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result
in external power supply going out of regulation. Ensure external VDD load will shunt current greater than maximum injection
current. This will be the greatest risk when the MCU is not consuming power. Examples are: if no system clock is present, or if
clock rate is very low (which would reduce overall power consumption).
5 All functional non-supply pins are internally clamped to VSS and VDD.
6 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
7 The RESET pin does not have a clamp diode to VDD. Do not drive this pin above VDD.
8 Maximum is highest voltage that POR will occur.
9 Simulated, not tested
10 Factory trimmed at VDD = 5.0 V, Temp = 25°C
MC9S08SH8 MCU Series Data Sheet, Rev. 3
Freescale Semiconductor
295