K30P144M100SF2_1109 Datasheet, PDF (33/72 Pages) Freescale Semiconductor, Inc – K30 Sub-Family Data Sheet

Peripheral operating requirements and behaviors
1. Typical data retention values are based on measured response accelerated at high temperature and derated to a constant
25°C use profile. Engineering Bulletin EB618 does not apply to this technology.
2. Data retention is based on T_javg = 55°C (temperature profile over the lifetime of the application).
3. Cycling endurance represents number of program/erase cycles at -40°C ≤ T_j ≤ 125°C.
6.4.2 EzPort Switching Specifications
Table 24. EzPort switching specifications
Num
EP1
EP1a
Description
Operating voltage
EZP_CK frequency of operation (all commands except
READ)
EZP_CK frequency of operation (READ command)
Min.
1.71
—
—
EP2
EZP_CS negation to next EZP_CS assertion
EP3
EZP_CS input valid to EZP_CK high (setup)
EP4
EZP_CK high to EZP_CS input invalid (hold)
EP5
EZP_D input valid to EZP_CK high (setup)
EP6
EZP_CK high to EZP_D input invalid (hold)
EP7
EZP_CK low to EZP_Q output valid
EP8
EZP_CK low to EZP_Q output invalid (hold)
EP9
EZP_CS negation to EZP_Q tri-state
2 x t_{EZP_CK}
5
5
2
5
—
0
—
Max.
3.6
f_SYS/2
f_SYS/8
—
—
—
—
—
16
—
12
Unit
V
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
EZP_CK
EZP_CS
EZP_Q (output)
EZP_D (input)
EP3
EP4
EP2
EP9
EP8
EP7
EP5
EP6
Figure 9. EzPort Timing Diagram
K30 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
Freescale Semiconductor, Inc.
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