M68HC08 Datasheet, PDF (31/188 Pages) Motorola, Inc – Microcontrollers

Freescale Semiconductor, Inc.
Memory
FLASH 2TS Memory
2.5.3 FLASH 2TS Erase Operation
NOTE:
Use this step-by-step procedure to erase a block of FLASH 2TS memory. Refer to
14.12 Memory Characteristics for a detailed description of the times used in this
algorithm.
1. Set the ERASE, BLK0, BLK1, and FDIV0 bits in the FLASH 2TS control
register. Refer to Table 2-2 for FDIV settings and to Table 2-3 for block
sizes.
2. Ensure target portion of array is unprotected by reading the block protect
register at address $FFF0. Refer to 2.5.5 FLASH 2TS Block Protection
and 2.5.6 FLASH 2TS Block Protect Register for more information.
3. Write to any FLASH 2TS address with any data within the block address
range desired.
4. Set the HVEN bit.
5. Wait for a time, t_Erase.
6. Clear the HVEN bit.
7. Wait for a time, t_Kill, for the high voltages to dissipate.
8. Clear the ERASE bit.
9. After a time, t_HVD, the memory can be accessed in read mode again.
While these operations must be performed in the order shown, other unrelated
operations may occur between the steps.
Table 2-3 shows the various block sizes which can be erased in one erase
operation.
Table 2-3. Erase Block Sizes
BLK1
0
0
1
1
BLK0
0
1
0
1
Block Size, Addresses Cared
Full array: 2 Kbytes
One-half array: 1 Kbyte
Eight rows: 64 bytes
Single row: 8 bytes
In step 3 of the erase operation, the cared addresses are latched and used
to determine the location of the block to be erased. For instance, with
BLK0 = BLK1 = 0, writing to any FLASH 2TS address in the range $7800 to $78F0
will enable the erase of all FLASH memory.
MC68HC908RF2 — Rev. 4.0
MOTOROLA
Memory
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Data Sheet
31