M68HC08 Datasheet, PDF (26/188 Pages) Motorola, Inc – Microcontrollers

Memory
Freescale Semiconductor, Inc.
Addr.
Register Name
Bit 7
6
5
4
3
2
SIM Reset Status Register ^{Read: POR}
PIN
COP
ILOP
ILAD
0
$FE01
(SRSR) Write:
See page 127. _POR:
1
X
X
X
X
X
SIM Break Flag Control ^Read: _BCFE
R
R
R
R
R
$FE02
Register (SBFCR) Write:
See page 128. _Reset:
0
0
0
0
0
0
$FE03
↓
$FE04
Reserved
R
R
R
R
R
R
1
Bit 0
LVI
0
X
X
R
R
0
0
R
R
$FE05
↓
$FE07
Unimplemented
$FE08
$FE09
FLASH 2TS Control ^Read:
0
Register (FLCR) Write:
See page 29. _Reset:
0
Reserved
R
FDIV0
0
R
BLK1
0
R
BLK0
0
R
HVEN MARGIN ERASE PGM
0
0
0
0
R
R
R
R
$FE0A
↓
$FE0B
Unimplemented
Break Address Register High ^Read:
$FE0C
(BRKH) Write:
See page 161. _Reset:
$FE0D
Break Address Register Low ^Read:
(BRKL) Write:
See page 161. _Reset:
$FE0E
Break Status and Control ^Read:
Register (BSCR) Write:
See page 160. _Reset:
$FE0F
LVI Status Register ^Read:
(LVISR) Write:
See page 105. _Reset:
Bit 15
0
Bit 7
0
BRKE
0
LVIOUT
0
14
0
6
0
BRKA
0
0
13
0
5
0
0
0
LOWV
0
0
= Unimplemented
12
11
10
0
0
0
4
3
2
0
0
0
0
0
0
9
Bit 8
0
0
1
Bit 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R = Reserved U = Unaffected X = Indeterminate
Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 5)
Data Sheet
26
Memory
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Go to: www.freescale.com
MC68HC908RF2 — Rev. 4.0
MOTOROLA