MC9S12XEG128MAA Datasheet, PDF (236/1324 Pages) Freescale Semiconductor, Inc – Reference Manual Covers MC9S12XE Family

Chapter 4 Memory Protection Unit (S12XMPUV1)
Field
Description
6
NEX
No-Execute bit — The NEX bit prevents the described memory range from being used as code memory. If this
bit is set every Op-code fetch in this memory range causes an access violation.
3–0
Memory range upper boundary address bits — The HIGH_ADDR[22:19] bits represent bits [22:19] of the
HIGH_ADDR[ global memory address that is used as the upper boundary for the described memory range.
22:19]
4.3.1.10 MPU Descriptor Register 4 (MPUDESC4)
Address: Module Base + 0x000A
7
6
5
4
3
2
1
0
R
HIGH_ADDR[18:11]
W
Reset
1
1
1
1
1
1
1
1
Figure 4-12. MPU Descriptor Register 4 (MPUDESC4)
Read: Anytime
Write: Anytime
Table 4-12. MPUDESC4 Field Descriptions
Field
Description
7–0
Memory range upper boundary address bits — The HIGH_ADDR[18:11] bits represent bits [18:11] of the
HIGH_ADDR[ global memory address that is used as the upper boundary for the described memory range.
18:11]
4.3.1.11 MPU Descriptor Register 5 (MPUDESC5)
Address: Module Base + 0x000B
7
6
5
4
3
2
1
0
R
HIGH_ADDR[10:3]
W
Reset
1
1
1
1
1
1
1
1
Figure 4-13. MPU Descriptor Register 5 (MPUDESC5)
Read: Anytime
Write: Anytime
Table 4-13. MPUDESC5 Field Descriptions
Field
Description
7–0
Memory range upper boundary address bits — The HIGH_ADDR[10:3] bits represent bits [10:3] of the
HIGH_ADDR[ global memory address that is used as the upper boundary for the described memory range.
10:3]
MC9S12XE-Family Reference Manual Rev. 1.25
236
Freescale Semiconductor