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MRF8P20165WHR3 Datasheet, PDF (2/16 Pages) Freescale Semiconductor, Inc – RF Power Field Effect Transistors N-Channel Enhancement--Mode Lateral MOSFETs
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
1C (Minimum)
Machine Model (per EIA/JESD22--A115)
B (Minimum)
Charge Device Model (per JESD22--C101)
III (Minimum)
Table 4. Electrical Characteristics (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Off Characteristics (1)
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
μAdc
Zero Gate Voltage Drain Leakage Current
(VDS = 28 Vdc, VGS = 0 Vdc)
IDSS
—
—
5
μAdc
Gate--Source Leakage Current
(VGS = 5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
μAdc
On Characteristics (2)
Gate Threshold Voltage (1)
(VDS = 10 Vdc, ID = 232 μAdc)
VGS(th)
1.2
1.8
2.7
Vdc
Gate Quiescent Voltage
(VDD = 28 Vdc, IDA = 550 mAdc, Measured in Functional Test)
VGS(Q)
2.0
2.7
3.5
Vdc
Drain--Source On--Voltage (1)
(VGS = 10 Vdc, ID = 1.5 Adc)
VDS(on)
0.05
0.2
0.3
Vdc
Functional Tests (2,3,4) (In Freescale Doherty Production Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 550 mA, VGSB = 1.3 Vdc,
Pout = 37 W Avg., f1 = 1980 MHz, f2 = 2010 MHz, 2--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.8 dB @ 0.01%
Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
Power Gain
Drain Efficiency
Gps
14.2
ηD
40.6
14.8
44.3
17.2
dB
—
%
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
PAR
5.2
5.8
—
dB
Adjacent Channel Power Ratio
ACPR
—
--31.0
--28.7
dBc
Typical Broadband Performance (4) — (In Freescale Doherty Characterization Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQA = 550 mA,
VGSB = 1.3 Vdc, Pout = 37 W Avg., Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on
CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
Frequency
Gps
(dB)
ηD
Output PAR
ACPR
(%)
(dB)
(dBc)
1930 MHz
16.1
47.0
7.1
--27.7
1960 MHz
16.3
47.7
7.1
--29.7
1995 MHz
16.3
46.0
7.0
--33.3
1. Side A and Side B are tied together for this measurement.
2. VDDA and VDDB must be tied together and powered by a single DC power supply.
3. Part internally matched both on input and output.
4. Measurement made with device in a Symmetrical Doherty configuration.
(continued)
MRF8P20165WHR3 MRF8P20165WHSR3
2
RF Device Data
Freescale Semiconductor