33810_10 Datasheet, PDF (2/35 Pages) Freescale Semiconductor, Inc – Automotive Engine Control IC

INTERNAL BLOCK DIAGRAM
INTERNAL BLOCK DIAGRAM
VPWR
VDD
CS
SI
SCLK
OUTEN
SO
DIN0
DIN1
DIN2
DIN3
GIN0
GIN1
GIN2
GIN3
SPKDUR
V_DD
~50 µA
V_DD
~50 µA
LOGIC CONTROL
~15 µA ~15 µA
V_DD
SPI
INTERFACE
V2.5
VPWR, VDD
V8.0 Analog
V2.5 Logic
POR, Over-voltage
Under-voltage
Oscillator
Bandgap
Bias
Outputs 0 to 3
~50 µA
PARALLEL
CONTROL
~50 µA
~50 µA
PWM
CONTROLLER
Gate Control
Current Limit
Temperature Limit
Short/Open
Exposed
Pad
VOC1
+
–
R_S
lLimit
75 µA
OUT0
OUT1
OUT2
OUT3
~50 µA
NOMI,MAXI
DAC
~50 µA
SPARK
DAC
SPARK DURATION
Open Secondary
+
– _SPI
+
– _SPI
V_{PWR −}⁺
FB0
FB1
FB2
100 µA
FB3
VOC
GPGD
Only
~50 µA
~50 µA
~50 µA
VDD
~5 0µA
GATE DRIVE
CONTROL
Low V
Clamp
GPGD
Clamp
NOMI
+
– _DAC
GD0
GD1
GD2
GD3
MAXI
+
– _DAC
RSP
NOMI
MAXI
Exposed Pad
GND
RSN
33810
2
Figure 2. 33810 Simplified Internal Block Diagram
Analog Integrated Circuit Device Data
Freescale Semiconductor