English
Language : 

33982B_09 Datasheet, PDF (18/36 Pages) Freescale Semiconductor, Inc – Single Intelligent High-current Self-protected Silicon High Side Switch (2.0 mΩ)
FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
MC33982 - Functional Block Diagram
Power Supply
MCU Interface and Output Control
SPI Interface
Parallel Control Inputs
Power Supply
MCU Interface and Output Control
Self-protected
High Side Switch
HS
High Side Switch
Figure 9. Functional Internal Block Diagram
POWER SUPPLY
The 33982 is designed to operate from 4.0 to 28 V on the
VPWR pin. Characteristics are provided from 6.0 to 20 V for
the device. The VPWR pin supplies power to internal
regulator, analog, and logic circuit blocks. The VDD supply is
used for Serial Peripheral Interface (SPI) communication in
order to configure and diagnose the device. This IC
architecture provides a low quiescent current sleep mode.
Applying VPWR and VDD to the device will place the device in
the Normal Mode. The device will transit to Fail-safe mode in
case of failures on the SPI (watchdog timeout).
HIGH SIDE SWITCH: HS
This pin is the high side output controlling multiple
automotive loads with high inrush current, as well as motors
and all types of resistive and inductive loads. This N-channel
MOSFET with a 2.0 mΩ RDS(ON), is self-protected and
presents extended diagnostics in order to detect load
disconnections and short-circuit fault conditions. The HS
output is actively clamped during a turn-off of inductive loads.
MCU INTERFACE AND OUTPUT CONTROL
In Normal mode, the load is controlled directly from the
MCU through the SPI. With a dedicated SPI command, it is
possible to independently turn on and off several loads that
are PWM’d at the same frequency, and duty cycles with only
one PWM signal. An analog feedback output provides a
current proportional to the load current. The SPI is used to
configure and to read the diagnostic status (faults) of high
side output. The reported fault conditions are: open load,
short-circuit to ground (OCLO-resistive and OCHI-severe
short-circuit), thermal shutdown, and under/over-voltage.
In Fail-safe mode, the load is controlled with dedicated
parallel input pins. The device is configured in default mode.
33982
18
Analog Integrated Circuit Device Data
Freescale Semiconductor