MC9S08DV60 Datasheet, PDF (17/414 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Section Number
Title
Page
Chapter 16
Timer Pulse-Width Modulator (S08TPMV3)
16.1 Introduction ....................................................................................................................................317
16.1.1 Features ...........................................................................................................................319
16.1.2 Modes of Operation ........................................................................................................319
16.1.3 Block Diagram ................................................................................................................320
16.2 Signal Description ..........................................................................................................................322
16.2.1 Detailed Signal Descriptions ...........................................................................................322
16.3 Register Definition .........................................................................................................................326
16.3.1 TPM Status and Control Register (TPMxSC) ................................................................326
16.3.2 TPM-Counter Registers (TPMxCNTH:TPMxCNTL) ....................................................327
16.3.3 TPM Counter Modulo Registers (TPMxMODH:TPMxMODL) ....................................328
16.3.4 TPM Channel n Status and Control Register (TPMxCnSC) ..........................................329
16.3.5 TPM Channel Value Registers (TPMxCnVH:TPMxCnVL) ..........................................330
16.4 Functional Description ...................................................................................................................332
16.4.1 Counter ............................................................................................................................332
16.4.2 Channel Mode Selection .................................................................................................334
16.5 Reset Overview ..............................................................................................................................337
16.5.1 General ............................................................................................................................337
16.5.2 Description of Reset Operation .......................................................................................337
16.6 Interrupts ........................................................................................................................................337
16.6.1 General ............................................................................................................................337
16.6.2 Description of Interrupt Operation ..................................................................................338
16.7 The Differences from TPM v2 to TPM v3.....................................................................................339
Chapter 17
Development Support
17.1 Introduction ....................................................................................................................................345
17.1.1 Forcing Active Background ............................................................................................345
17.1.2 Features ...........................................................................................................................346
17.2 Background Debug Controller (BDC) ...........................................................................................346
17.2.1 BKGD Pin Description ...................................................................................................347
17.2.2 Communication Details ..................................................................................................348
17.2.3 BDC Commands .............................................................................................................352
17.2.4 BDC Hardware Breakpoint .............................................................................................354
17.3 On-Chip Debug System (DBG) .....................................................................................................355
17.3.1 Comparators A and B ......................................................................................................355
17.3.2 Bus Capture Information and FIFO Operation ...............................................................355
17.3.3 Change-of-Flow Information ..........................................................................................356
17.3.4 Tag vs. Force Breakpoints and Triggers .........................................................................356
17.3.5 Trigger Modes .................................................................................................................357
17.3.6 Hardware Breakpoints ....................................................................................................359
MC9S08DV60 Series Data Sheet, Rev 3
Freescale Semiconductor
17
Subject to Change