MC9S08AC16_09 Datasheet, PDF (101/330 Pages) Freescale Semiconductor, Inc – HCS08 Microcontrollers

Chapter 6 Parallel Input/Output
R
W
Reset
7
PTESE7
0
6
PTESE6
5
PTESE5
4
PTESE4
3
PTESE3
2
PTESE2
1
PTESE1
0
0
0
0
0
0
Figure 6-33. Output Slew Rate Control Enable for Port E (PTESE)
0
PTESE0
0
Table 6-24. PTESE Register Field Descriptions
Field
Description
7:0
PTESE[7:0]
Output Slew Rate Control Enable for Port E Bits — Each of these control bits determine whether output slew
rate control is enabled for the associated PTE pin. For port E pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port E bit n.
1 Output slew rate control enabled for port E bit n.
R
W
Reset
7
PTEDS7
0
6
PTEDS6
5
PTEDS5
4
PTEDS4
3
PTEDS3
2
PTEDS2
1
PTEDS1
0
0
0
0
0
0
Figure 6-34. Output Drive Strength Selection for Port E (PTEDS)
0
PTEDS0
0
Table 6-25. PTEDS Register Field Descriptions
Field
Description
7:0
PTEDS[7:0]
Output Drive Strength Selection for Port E Bits — Each of these control bits selects between low and high
output drive for the associated PTE pin.
0 Low output drive enabled for port E bit n.
1 High output drive enabled for port E bit n.
MC9S08AC16 Series Data Sheet, Rev. 8
Freescale Semiconductor
101