FAMP0417CAX-W70E Datasheet, PDF (5/12 Pages) FIDELIX – 256K x 16 bit Super Low Power and Low Voltage Full CMOS RAM

FMP0417CAx-W70E
CAPACITANCE¹⁾ (f=1MHz , T_A=25’C)
Item
Symbol
Test Condition
Min
Input capacitance
CIN
VIN=0V
-
Input/Output capacitance
CIO
VIO=0V
-
1. Capacitance is sampled, not 100% tested.
CMOS LPRAM
Max
Unit
8
pF
8
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Average operating current
Output low voltage
Output high voltage
Standby Current(TTL)
Standby Current(CMOS)
Low Power Modes
Symbol
Test Conditions
ILI VIN=VSS to VCC
ILO /CS=VIH, /ZZ=VIH, /OE=VIH or /WE=VIL, VIO=VSS to VCC
ICC1
Cycle time=1us, 100%duty, IIO=0mA, /CS≤0.2V, /ZZ=VIH,
VIN≤0.2V or VIN≥VCC-0.2V
ICC2
Cycle time=Min, IIO=0mA, 100% duty, /CS=VIL, /ZZ=VIH,
VIN=VIL or VIH
VOL IOL=0.5mA
VOH IOH=-0.5mA
ISB
ISB1
ISB0
ISB0a
ISB0b
ISB0c
/CS=VIH, /ZZ=VIH, Other inputs=VIH or VIL
/CS≥VCC-0.2V, /ZZ≥VCC-0.2V, Other inputs=0~VCC
/ZZ≤0.2V, Other inputs=0~V_CC, No refresh(DPD)
/ZZ≤0.2V, Other inputs=0~V_CC, ¼ refresh area selection
/ZZ≤0.2V, Other inputs=0~V_CC, ½ refresh area selection
/ZZ≤0.2V, Other inputs=0~V_CC, All refresh area selection
Min Typ Max
-1
-
1
-1
-
1
-
1.5
3
-
15
25
0.2VCCQ
0.8VCCQ
-
-
0.3
-
-
70
-
-
10
-
-
55
-
-
60
-
-
70
Unit
uA
uA
mA
mA
V
V
mA
uA
uA
uA
uA
uA
AC Input/Output Reference Waveform
VCCQ
Input¹
VCCQ/2 ²
Test Points
VCCQ/2³ Output
VSS
NOTE:
1. AC test inputs are driven at VCCQ for a logic 1 and VSS for a logic 0. Input rise and fall times (10% to 90%) < 1.6ns.
2. Input timing begins at VCCQ/2.
3. Output timing ends at VCCQ/2.
AC Output Load Circuit
DUT
Test Point
50Ω
30pF
VCCQ/2
5
Revision 0.0
Feb. 2008