FAMP0417CAX-W70E Datasheet, PDF (3/12 Pages) FIDELIX – 256K x 16 bit Super Low Power and Low Voltage Full CMOS RAM

FMP0417CAx-W70E
CMOS LPRAM
256K x 16 bit Super Low Power and Low Voltage Full CMOS RAM
FEATURES
• Process Technology : Full CMOS
• Organization : 256K x 16
• Power Supply Voltage : 2.7~3.3V
• Three state output and TTL Compatible
• Separated I/O power(VCCQ) & Core power(VCC)
• Automatic power-down when deselected
• Low Power & Page Modes
FMP0417CA1 : support the PASR/DPD function
FMP0417CA2 : support the Direct DPD function
FMP0417CA4 : support the PASR/DPD/PAGE function
FMP0417CA5 : support the Direct DPD/PAGE function
• Page read/write operation by 16 words
(FMP0417CA4, FMP0417CA5)
• DPD mode by using MRS only
(FMP0417CA1, FMP0417CA4)
• Direct DPD mode when /ZZ goes low
(FMP0417CA2, FMP0417CA5)
PRODUCT FAMILY
Product Family
FMP0417CAx-W70E
Operating
Temperature
Operating
Voltage (V)
Speed
Min. Typ. Max.
Extended
(-25~85’C)
2.7 3.0 3.3 70ns
ICC1
f = 1MHz
Typ.
Max.
1.5mA
3mA
Power Dissipation
ICC2
f = fmax
Typ.
Max.
15mA 25mA
ISB1
(CMOS Standby
Current)
Typ.
Max.
30uA
70uA
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at Vcc = Vcc (typ) and T_A = 25C.
2. F=FBGA, G=FBGA(Pb-Free), H=FBGA(Pb-Free & Halogen Free), W=WAFER
PIN DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
Name
Function
Name
Function
/ZZ
Low Power Modes VCC
Core Power
/CS
Chip Select Input VCCQ
I/O Power
/OE
Output Enable Input VSS
Ground
/WE
Write Enable Input /UB Upper Byte(I/O9~16)
A0~A17
Address Inputs
/LB Lower Byte(I/O 1~8)
I/O1~I/O16 Data Inputs/Outputs DNU
Do Not Use
Row
Addresses
Clk gen.
Row
select
Precharge circuit.
Memory array
VCC
VSS
I/O1~I/O8
I/O9~I/O16
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
Column Addresses
/CS
/ZZ
/OE
Control Logic
/WE
/UB
/LB
3
Revision 0.0
Feb. 2008