M21050_17 Datasheet, PDF (57/70 Pages) M/A-COM Technology Solutions, Inc. – Duplex Quad (Octal) Multi-Rate CDR (1.0 Gbps - 3.2 Gbps)

Product Specifications
3.5
CDR Performance Specifications
Table 3-10. CDR High-Speed Performance
Symbol
Parameter
Notes Minimum Typical Maximum Units
DR_IN Input signal data rate (NRZ data) divider ratio = 1
1
2
—
3.2
Gbps
DR_IN Input signal data rate (NRZ data) divider ratio = 2
1
1
—
1.6
Gbps
J_TOL Jitter tolerance (Figure 3-3)
1, 2
—
0.625
—
UI
R_j
Output data random jitter (pp)
1, 7
—
—
100
mUI
D_j
Output data deterministic jitter (pp)
1, 7
—
—
150
mUI
T_j
Output data total jitter (pp)
1, 7
—
—
250
mUI
J_pp
Output data broadband jitter (pp)
1, 8, 10
—
135
230
mUI
J_rms Output data broadband jitter (rms)
1, 8, 10
—
22
40
mUI
D_DC
Output data duty cycle
1
45
50
55
%
T_LAT Latency from input to output
1, 10
—
615
800
ps
CH_SK Channel to channel output data skew (utilizing CDR)
1
—
20
65
ps
T_init
Initialization time
1, 3, 6
2
—
ms
T_FRA Frequency acquisition time
1, 4
0.4
—
ms
T_PLL Phase lock time with 100 ppm delta F
1, 5
100
ns
T_PLL Phase lock time with 0 ppm delta F
1, 5
50
ns
Notes:
1. Specified at recommended operating conditions – see Table 3-2.
2. Jitter tolerance specified with input equalization and output pre-emphasis disabled, utilizing PRBS 2²³-1.
3. Time after power up, reset, or data-rate change.
4. Time from application of valid data to lock within +/-20% of lock phase.
5. Defined as when phase settles to within 20% of lock phase.
6. After reset (master or soft), initialization takes place, then frequency acquisition.
7. R_j, D_j, T_j represent jitter measured to BER of 10^-12 per T11.2 FC-PI-2 specifications.
8. Broadband jitter defined as jitter measured on sampling oscilloscope without the use of filters.
9. Maximum value specified incorporates asynchronous aggressors.
10. When the CDR is enabled, the latency is the number shown plus 1.5 times the period of the clock. For example, when operating the CDR at 2.5 Gbps, the
typical latency is 615 ps + 600 ps = 1.215 ns. When the CDR is bypassed, the latency through the M21050 is the number listed.
21050-DSH-001-F
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