FR014H5JZ Datasheet, PDF (9/12 Pages) Fairchild Semiconductor – High-Side Reverse Bias / Reverse Polarity Protector With Integrated Over Voltage Transient Suppression

Typical Application Waveforms
Typical USB3.0 conditions.
─ V_IN, 2V/div. The input voltage between POS and CTL
─ V_OUT, 2V/div. The output voltage between NEG and CTL
─ V_D, 1V/div. The startup diode voltage between POS and NEG
─ i_IN, 5A/div. The input current flowing from POS to NEG
Time: 5µs/div
Figure 17. Normal Bias Startup Waveform, DC Power Source=5V, C₁=100µF, C₂=10µF, R₁=R₂=10kΩ, R₃=27Ω
─ V_IN, 2V/div. The input voltage between POS and CTL
─ V_D, 2V/div. The startup diode voltage between POS and NEG
─ V_OUT, 1V/div. The output voltage between NEG and CTL
─ i_IN, 0.1A/div. The input current flowing into POS
Time: 100ns/div
Figure 18. Reverse Bias Startup Waveform, DC Power Source=5V, C1=100µF, C2=10µF, R1=R2=10kΩ, R3=27Ω
© 2012 Fairchild Semiconductor Corporation
FR014H5JZ • Rev. C1
9
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