FAN41501 Datasheet, PDF (6/11 Pages) Fairchild Semiconductor – Ground Fault Interrupter Self-Test Digital Controller

The self test cycle lasts for 66 ms to allow four self-test
cycle attempts. After the timer has expired, the EOL
alarm is enabled. Figure 7 to Figure 10 show an
example of the EOL alarm signal connected to the gate
of an SCR. When the EOL alarm signal is enabled, the
VDD voltage is discharged, which causes a POR. The
EOL alarm is disabled and a self-test cycle is repeated
in one second.
In addition to the above GFCI tests, the FAN41501 also
performs a pin 4 (Phase pin) continuity check when
power is first detected. When VDD exceeds 2.5 V, pin 4
is checked for an open or short. If this continuity check
fails after 60 ms, the EOL alarm is enabled. Figure 11
shows an example of the Phase pin with R3 removed
(floating pin). After approximately 60ms, the EOL alarm
is enabled.
After a self-test cycle failure, the EOL alarm is latched
HIGH for 133 ms. This signal generates a repetitive
3.75 Hz digital square wave. There are two ways to
reset the EOL alarm signal. The first is POR as
described above, which can occur if the AC power is
cycled. Since it may be undesirable to cycle the AC
power, the EOL alarm signal can also be connected to
the gate of a SCR or “clamp diode” to generate a POR.
If the EOL alarm signal is diode clamped when the EOL
alarm signal goes HIGH, a high IOH current is generated.
This current is dependent on R2 and C5, however; if the
datasheet values are used, the typical IOH peak current
can be greater than 5 mA. This high current can be
used to “latch on” a SCR and cause VDD to drop below
2.5 V, which generates a POR. Figure 11 shows the VDD
signal when the EOL alarm signal is connected to the
gate of a SCR with a series diode. The high EOL alarm
IOH current causes VDD to drop below 2.5 V during the
VAC zero crossing.
Another way to reset the EOL alarm signal is to detect a
successful manual test cycle. If the FAN41501 is
latched in an EOL state and detects a “manual test”
(i.e., the TEST button is pressed) the FAN41501
disables the EOL alarm and perform sa self-test cycle in
one second. If an EOL alarm state has occurred due to
a pin 4 continuity check failure, the “manual test” reset
option is disabled.
Referring to Figure 1, the EOL alarm signal must be
used to open the load contacts (power denial) if a self-
test cycle fails for the tested components (with the
exception for a solenoid or SCR open failure). As
described above, this can be done with a redundant
SCR or by connecting the EOL alarm signal to Q1 via a
series diode. If Q1 is used to open the load contacts, a
gate resistor must be added from the GFCI controller
gate drive pin to the gate of the SCR. If Q1 or the
solenoid fails due to an open circuit, a visual EOL signal
can be generated instead of power denial. This can be
accomplished by making the series diode from the EOL
Alarm pin to the gate of Q1 a LED diode. This diode
flashes every second. Additionally, an LED diode can be
added in series with RTEST2 and the collector of Q2. This
LED diode can be used to provide a self-test signal at
power up and then every 90 minutes. If the self-test
cycle fails, it flashes every second.
In summary, the FAN41501 can be added to an existing
UL943 circuit to comply with the 2015 UL self-test
requirement. The small package size and the minimum
required components allow for a compact, low-cost,
GFCI self-test solution.
Contact a Fairchild Semiconductor representative for
details about how to test the FAN41501 self-test
features in production or for details about the 2015
UL943 self-test application requirements.
© 2014 Fairchild Semiconductor Corporation
FAN41501 • 1.0.1
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