RFD14N05LSM9A Datasheet, PDF (5/8 Pages) Fairchild Semiconductor – 14A, 50V, 0.100 Ohm, Logic Level, N-Channel Power MOSFETs

RFD14N05L, RFD14N05LSM, RFP14N05L
Typical Performance Curves Unless Otherwise Specified (Continued)
2.0
V_GS = V_DS, I_D = 250µA
1.5
2.0
I_D = 250µA
1.5
1.0
1.0
0.5
0
-80 -40
0
40
80 120 160 200
T_J, JUNCTION TEMPERATURE (^oC)
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
800
600
400
200
0
0
C_ISS
V_GS = 0V, f = 1MHz
C_ISS = C_GS + C_GD
C_RSS = C_GD
C_OSS ≈ C_DS + C_GD
C_OSS
C_RSS
5
10
15
20
25
V_DS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 14. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
VARY t_P TO OBTAIN
REQUIRED PEAK I_AS
R_G
V_GS
t_P
0V
V_DS
L
DUT
+
V_DD
-
I_AS
0.01Ω
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT
©2004 Fairchild Semiconductor Corporation
0.5
0
-80
-40
0
40
80
120 160 200
T_J, JUNCTION TEMPERATURE (^oC)
FIGURE 13. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
50
V_DD = BV_DSS
40
5
V_DD = BV_DSS
4
30
3
20
0.75 BV_DSS
2
0.50 BV_DSS
0.25 BV_DSS
10
R_L = 3.57Ω
1
I_G(REF) = 0.4mA
V_GS = 5V
0
0
20 _{I-I-G-G-----((}--AR-----CE----F-T---⁾-₎
t, TIME (µs)
80 _{I-I-G-G-----((}--AR-----CE----F-T---⁾-₎
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260,
FIGURE 15. TRANSCONDUCTANCE vs DRAIN CURRENT
t_P
I_AS
BV_DSS
V_DS
V_DD
0
t_AV
FIGURE 17. UNCLAMPED ENERGY WAVEFORMS
RFD14N05L, RFD14N05LSM, RFP14N05L Rev. B1