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RFD14N05LSM9A Datasheet, PDF (2/8 Pages) Fairchild Semiconductor – 14A, 50V, 0.100 Ohm, Logic Level, N-Channel Power MOSFETs
RFD14N05L, RFD14N05LSM, RFP14N05L
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . .
Derate above 25oC
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PD
..
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
RFD14N05L, RFD14N05LSM,
RFP14N05L
50
50
±10
14
Refer to Peak Current Curve
Refer to UIS Curve
48
0.32
-55 to 175
300
260
UNITS
V
V
V
A
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
SYMBOL
TEST CONDITIONS
MIN
BVDSS ID = 250µA, VGS = 0V, Figure 13
50
VGS(TH) VGS = VDS, ID = 250µA, Figure12
1
IDSS VDS = 40V, VGS = 0V
-
VDS = 40V, VGS = 0V, TC = 150oC
-
IGSS VGS = ±10V
-
rDS(ON) ID = 14A, VGS = 5V, Figures 9, 11
-
t(ON) VDD = 25V, ID = 7A,
-
td(ON)
RL = 3.57Ω, VGS = 5V,
RGS = 0.6Ω
-
tr
-
td(OFF)
-
tf
-
t(OFF)
-
Qg(TOT)
Qg(5)
Qg(TH)
VGS = 0V to 10V
VGS = 0V to 5V
VGS = 0V to 1V
VDD = 40V, ID = 14A, -
RL = 2.86Ω
-
Figures 20, 21
-
CISS VDS = 25V, VGS = 0V, f = 1MHz
-
COSS Figure 14
-
CRSS
-
RθJC
-
RθJA TO-251 and TO-252
-
RθJA TO-220
-
Source to Drain Diode Specifications
TYP
-
-
-
-
-
-
-
13
24
42
16
-
-
-
-
670
185
50
-
-
-
MAX
-
2
1
50
±100
0.100
60
-
-
-
-
100
40
25
1.5
-
-
-
3.125
100
80
UNITS
V
V
µA
µA
nA
Ω
ns
ns
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
oC/W
oC/W
oC/W
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP MAX UNITS
Source to Drain Diode Voltage (Note 2)
VSD ISD = 14A
-
-
1.5
V
Diode Reverse Recovery Time
trr
ISD = 14A, dISD/dt = 100A/µs
-
-
125
ns
NOTES:
2. Pulse Test: Pulse Width ≤300ms, Duty Cycle ≤2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current
Capability Curve (Figure 5).
©2004 Fairchild Semiconductor Corporation
RFD14N05L, RFD14N05LSM, RFP14N05L Rev. B1