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FMS7951 Datasheet, PDF (4/8 Pages) Fairchild Semiconductor – Zero Delay Clock Multiplier | |||
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PRODUCT SPECIFICATION
FMS7951
Absolute Maximum Ratings
Symbol
Parameter
Ratings
Units
VDD, VIN
TSTG
TB
TA
Voltage on any pin with respect to ground
Storage Temperature
Ambient Temperature
Operating Temperature
-0.5 to 7.0
V
-65 to 150
°C
-55 to 125
°C
0 to 70
°C
Stresses greater than those listed in the table may cause permanent damage to the device. These represent a stress rating only.
Operation of the device at these or any other conditions above those speciï¬ed in the operating sections of this speciï¬cation is
not implied. Maximum conditions for extended periods may effect reliability.
DC Electrical Characteristics
TA = 0 to 70°C; Supply Voltage 3.3 V ±0.2V (unless otherwise stated)
Parameter
Symbol Conditions
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Peak to Peak Input
Voltage
VIL
TCLK; control pins
VIH
TCLK; control pins
IIL
VIN= 0
IIH
VIN= VDD
VPP
PECL_CLK/PCL_CLK
Common Mode Range
Output Low Voltage
Output High Voltage
Input Capacitance(1)
Supply Current
Clock Stabilization(1)
VCMR
VOL
VOH
CIN
IDD
TSTAB
IOL= 40 mA
IOH= â40mA
Outputs loaded
From VDD = 3.3V to 1% Target
Note:
1. Guaranteed by design, not subject to 100% production testing.
Min. Typ.
2.0
-10
-30
0.3
Max.
0.8
3.6
10
30
1.0
Units
V
V
µA
µA
V
VDD-2.0
VDD-0.6 mV
0.5
V
2.2
V
7.0
pF
TBD 150
mA
10
mS
AC Electrical Characteristics
TA = 0 to 70°C; Supply Voltage VDD = 3.3V ±0.2V, CL = 10 pF (unless otherwise stated)
Parameter
Symbol Conditions
Min. Typ.
Input Frequency
FIN
Feedback Divide = 2
10
Feedback Divide = 4
10
Feedback Divide = 8
10
TCLK Input Rise/Fall Time(1) TR_IN/TF_IN
â
TCLK Input Duty Cycle(1)
DT_IN
25
Output Frequency Range
FOUT QA; DIV_SEL A = 0V
QB, QC & QD;
DIV_SEL B, C, D = 0V
Output to Output Skew
TSK1 VTH = VDD/2; DIV_SEL A = 0
VTH = VDD/2; DIV_SEL A = 1 -300
Input to FBIN Delay
TSK2
TCLK
50
PECL_CLK
-950
Max.
175
85
42
3.0
75
175
88
750
300
400
-600
Units
MHz
ns
%
MHz
MHz
pS
pS
4
REV. 1.0.0 1/9/01
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