FAN6210 Datasheet, PDF (3/11 Pages) Fairchild Semiconductor – Primary-Side Synchronous Rectifier (SR) Trigger Controller for Dual Forward Converter

Marking Information
Pin Configuration
F: Fairchild Logo
Z: Plant Code
X: Year Code
Y: Week Code
TT: Package Type
T: M=SOP
P: Y: Green Package
M: Manufacture Flow Code
Figure 3. Top Mark
Figure 4. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
Name
XN
XP
SIN
RDLY
DET
VDD
SOUT
GND
Description
Pulse signal output terminal for SR off control signal.
Pulse signal output terminal for SR on control signal.
Input signal for high- and low-side gate driver outputs.
Delay time setting. This delay time is SOUT rising to trigger XP pulse delay time.
Sensing freewheel diode voltage.
The power supply pin.
Gate driving to high- and low-side gate driver.
Ground.
© 2009 Fairchild Semiconductor Corporation
FAN6210 Rev. 1.0.1
3
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