FAN7392_10 Datasheet, PDF (17/18 Pages) Fairchild Semiconductor – High-Current, High- and Low-Side, Gate-Drive IC

Physical Dimensions (Continued)
.
10.30±0.20
8.890
16
B
A
9
7.50±0.10
10.325
9.44
9.2 ^10.95
1
PIN ONE
INDICATOR
2.65 MAX
8
0.51
1.27
0.35
0.25 M C B A
1.75 TYP
1.27 TYP
0.55 TYP
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.20±0.10
C
0.10 C
0.33
0.20
SEATING PLANE
(R0.10)
(R0.10)
8°
0°
0.75
0.25
X 45°
NOTES: UNLESS OTHERWISE SPECIFIED
GAGE PLANE
0.25
A) THIS PACKAGE CONFORMS TO JEDEC
MS-013, ISSUE E, DATED SEPT 2005.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS. _{pdip8_dim.pdf}
D) LANDPATTERN STANDARD: SOIC127P1030X265-16L
E) DRAWING FILENAME: MKT-16Brev2
0.40~1.27
M16BREV2
(1.40)
SEATING PLANE
DETAIL A
SCALE: 2:1
Figure 40. 16-Lead Small Outline Package (SOP)
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specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
© 2009 Fairchild Semiconductor Corporation
FAN7392 Rev. 1.0.3
17
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