FAN50FC3 Datasheet, PDF (17/21 Pages) Fairchild Semiconductor – 8-Bit Programmable, 2- to 3-Phase FastvCore™ Buck Controller

Once the SS voltage is within 100mV of the boot
voltage, the boot voltage delay time (TD3) is started.
The end of the boot voltage delay time signals the
beginning of the second soft-start time (TD4). The SS
voltage changes from the boot voltage to the
programmed VID DAC voltage (either higher or lower)
using the SS amplifier with the limited output current of
15µA. The voltage of the FB pin follows the ramping
voltage of the SS pin, limiting the inrush current during
the transition from the boot voltage to the final DAC
voltage. The second soft-start time depends on the boot
voltage, the programmed VID DAC voltage, and C_SS.
If either EN is taken LOW or V_CC drops below UVLO,
DELAY and SS are reset to ground to be ready for
another soft-start cycle. Figure 10 shows typical start-up
waveforms for the FAN50FC3.
The latch-off function can be reset by cycling the supply
voltage to the FAN50FC3 or by toggling the EN pin
LOW for a short time. To disable the short-circuit latch-
off function, an external resistor can be placed in parallel
with C_DLY to prevent the DELAY capacitor from charging
up to the 1.7V threshold. The addition of this resistor
causes a slight increase in the delay times.
During start-up, when the output voltage is below
200mV, a secondary current limit is active. This
secondary current limit clamps the internal COMP
voltage at the PWM comparators to 1.5V. Typical over-
current latch-off waveforms are shown in Figure 11.
Vcore
Vcore
V_DELAY
V_OD#
V_VRREADY
V_PHASE1
V_EN
V_DELAY
Figure 10. Start-up Waveforms
Current-Limit, Short-Circuit, and Latch-Off
Protections
The FAN50FC3 compares a programmable current-limit
set point to the voltage from the output of the current
sense amplifier. The current-limit level is set with the
resistor from the ILIMIT pin to ground. During operation,
the voltage on ILIMIT is 1.7V. The current through the
external resistor is internally scaled to give a current limit
threshold of 10mV/µA. If the voltage between CSREF
and CSCOMP rises above the current-limit threshold,
the internal current-limit amplifier controls the internal
COMP voltage to maintain the average output current at
the limit.
After TD5 has completed, an over-current (OC) event
starts a latch-off delay timer. The delay timer uses the
DELAY pin timing capacitor. During current limit, the
DELAY pin current is reduced to 3.75µA. When the
voltage on the delay pin reaches 1.7V, the controller
shuts down and latches off. The current limit latch-off
delay time is therefore set by the current of 3.75µA
charging the delay capacitor 1.7V. This delay is four
times longer than the delay time during the start-up
sequence. If there is a current limit during start-up, the
FAN50FC3 goes through TD1 to TD5 in current limit,
then starts the latch-off timer. Because the controller
continues to operate during the latch-off delay time, if
the OC is removed before the 1.7V threshold is reached,
the controller returns to normal operation and the
DELAY capacitor is reset to GND.
Figure 11. Over-Current Latch-off Waveforms
FastvCore™ Operation
FastvCore™ improves the transient response for a load
step-up change. Normally a controller has to wait till the
next clock cycle if a load step-up happens during
between PWM signals. With FastvCore™, the controller
is able to immediately respond to the load step change,
so that the inductor current increases to the new load
current in a shorter period of time.
FastvCore™ is adjusted by connecting a resistor
(R_SETOS) between pin 16 (VOSADJ) and AGND to set
the threshold where FastvCore™ is initiated.
R_SETOS = (V_OS+LLTOB) • R_T • 10
EQ. 1
where:
R_T = the frequency set resistor
V_OS =
the target FastvCore™ detection threshold that
is the voltage difference between the output
voltage starting point and the voltage when the
FastvCore™ starts to respond to a load step-
up change
LLTOB= the socket load line tolerance band
FastvCore™ design example:
If:
Then:
R_T = 267kohm
V_OS = 35mV
LLTOB = +/-19mV
R_SETOS
= (V_OS+LLTOB) • R_T • 10
= (35mV+19mV) • 267kohm • 10
= 144.2kohm
© 2007 Fairchild Semiconductor Corporation
FAN50FC3 Rev. 1.0.0
17 of 21
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