FAN2315MPX Datasheet, PDF (14/19 Pages) Fairchild Semiconductor – FAN2315 TinyBuck 15 A Integrated Synchronous Buck Regulator

The capacitance is given by:
=
× × (1 − )
×∆
(18)
where ΔV_IN is input voltage ripple, normally 1% of V_IN.
For example; for V_IN=12 V, ΔV_IN=120 mV, V_OUT=1.2 V,
15 A load, and f_SW=500 kHz; C_IN is 22.5 µF and I_CIN(RMS)
is 4.5 A_RMS. Select four 10 µF 25V-rated ceramic
capacitors with X7R or similar dielectric, recognizing
that the capacitor DC bias characteristic indicates that
the capacitance value falls approximately 40% at
V_IN=12 V, with a resultant small increase in ΔV_IN ripple
voltage above 120 mV used in the calculation. Also,
each 10 µF can carry over 3 A_RMS in the frequency
range from 100 kHz to 1 MHz, exceeding the input
capacitor current rating requirements. An additional
0.1 µF capacitor may be needed to suppress noise
generated by high frequency switching transitions.
Output Capacitor Selection
Output capacitor C_OUT is also selected based on voltage
rating, RMS current I_COUT(RMS) rating, and capacitance.
For capacitors having DC voltage bias derating, such as
ceramic capacitors, higher rating is highly recommended.
When calculating C_OUT, usually the dominant
requirement is the current load step transient. If the
unloading transient requirement (I_OUT transitioning from
HIGH to LOW), is satisfied, then the load transient (I_OUT
transitioning LOW to HIGH), is also usually satisfied.
The unloading C_OUT calculation, assuming C_OUT has
negligible parasitic resistance and inductance in the
circuit path, is given by:
= ×(
−
+∆ ) −
(19)
where I_MAX and I_MIN are maximum and minimum load
steps, respectively and ΔV_OUT is the voltage
overshoot, usually specified at 5%.
For example: for V_I=12 V, V_OUT=1.2 V, 10 A I_MAX, 5 A
I_MIN, f_SW=500 kHz, L_OUT=560 nH, and 4% ΔV_OUT ripple of
36 mV; the C_OUT value is calculated to be 360 µF. This
capacitor requirement can be satisfied using eight
47 µF, 6.3 V-rated X5R ceramic capacitors. This
calculation applies for load current slew rates that are
faster than the inductor current slew rate, which can be
defined as V_OUT/L during the load current removal.
Setting the Current Limit
Current limit is implemented by sensing the inductor
valley current across the LS R_DS(ON) during the LS on-
time. The current limit comparator prevents a new on-
time from being started until the valley current is less
than the current limit.
The set point is configured by connecting a resistor from
the ILIM pin to the SW pin. A trimmed current of
approximately 20 µA is output onto the ILIM pin, which
creates a voltage across the resistor. When the voltage
on ILIM goes negative, an over-current condition is
detected.
The current flowing out of the ILIM pin through R_ILIM is
trimmed to compensate for both the R_DS(ON) of the LS
MOSFET and the offset voltage of the current limit
comparator. R_ILIM is calculated by:
= 1.08 ×
×
(20)
where K_ILIM is the current source scale factor equal to
the average R_DS,ON of the LS MOSFET divided by the
average ILIM pin current of 20 µA, and I_VALLEY is the
inductor valley current when the current limit threshold
is reached. The factor 1.08 accounts for the
temperature offset of the LS MOSFET compared to
control circuit (approximately 20°C), and the
approximate increase in the R_DS,on of the LS MOSFET
of 4000 ppm/°C.
With the constant on-time architecture, HS is always
turned on for a fixed on-time; this determines the peak-
to-peak inductor current.
Current ripple ΔI is given by:
∆ =( ^−
)×
(21)
From the equation above, the worst-case ripple occurs
during an output short circuit (where V_OUT is 0 V). This
should be taken into account when selecting the current
limit set point.
The FAN2315 uses valley-current sensing, the current
limit (I_ILIM) set point is the valley (I_VALLEY).
The valley current level for calculating R_ILIM is given by:
=
(
)
−
∆
2
(22)
where I_{LOAD (CL)} is the DC load current when the
current limit threshold is reached.
For example: In a converter designed for 15 A steady-
state operation and 4.5 A current ripple, the current-limit
threshold could be selected at 120% of I_LOAD,(MAX) to
accommodate transient operation and inductor value
decrease under loading. As a result, I_LOAD,(MAX) is 18 A,
I_VALLEY=15.75 A, and R_ILIM is selected as the standard
value of 1.37 kΩ.
Boot Resistor
In some applications, especially with higher input
voltage, the V_SW ring voltage may exceed derating
guidelines of 80% to 90% of absolute rating for V_SW. In
this situation, a resistor can be connected in series with
the boot capacitor (C3 in Figure 1) to reduce the turn-on
speed of the high-side MOSFET to reduce the
amplitude of the V_SW ring voltage.
© 2011 Fairchild Semiconductor Corporation
FAN2315 • Rev. 1.0.4
14
www.fairchildsemi.com