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FNA21012A Datasheet, PDF (13/15 Pages) Fairchild Semiconductor – 1200 V Motion SPMR 2 Series
R1
Gating WH
R1
Gating VH
Gating UH
M
C
U
Fault
Gating WL
Gating VL
Gating UL
R1
C1 C1 C1
5V l ine
R3
R1
C1
C1
R1
R1
R1
C1 C1 C1
Temp.
Monitoring
5V l ine
R7
C4
R2
C3
C4
R2 C4
C3
C4
C4
R2
C3
C4
(30) IN(WH)
(31) VCC(WH)
(32) V BD(W)
(33) VB( W)
(34) VS ( W)
( 25) IN(VH )
( 26) VCC(VH )
(27) V BD(V )
( 28) VB(V)
(29) VS(V)
( 19) IN(UH)
(21) VCC(UH)
( 20) C OM(H)
( 22) VBD(U )
( 23) VB(U)
(24) VS( U)
C5
15V li ne
(16) C FOD
(15) V FO
(14) IN(WL)
( 13) IN(VL)
( 12) IN(UL)
(10) VCC(L)
C2
C4
(11) C OM(L)
(9) VTH
(8) RTH
Ther mistor
IN
VC C
COM HVIC OUT
VB
VS
IN
VC C
COM
HVIC
OUT
VB
VS
IN
VC C
COM HVIC
OUT
VB
VS
CF OD
VF O
IN
IN
IN
VC C
COM
LVIC
CSC
OUT
OUT
OUT
(17) CSC
D
R6
B
C6
C
P (1)
W (2)
V (3)
U (4)
M
C7
VDC
NW (5)
R4 A
NV (6)
NU (7)
RSC (18)
W-Phase Current
V-Phase Current
U-Phase Current
R4
Shunt
Resistor
E
Power
GND Line
R4
R5
Sense
Resistor
Control
GND Line
Figure 15. Typical Application Circuit
Notes:
15. To avoid malfunction, the wiring of each input should be as short as possible (less than 2 - 3 cm).
16. VFO output is an open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. Please
refer to Figure 14.
17. Fault out pulse width can be adjust by capacitor C5 connected to the CFOD terminal.
18. Input signal is active-HIGH type. There is a 5 kW resistor inside the IC to pull-down each input signal line to GND. RC coupling circuits should be adopted for the prevention
of input signal oscillation. R1C1 time constant should be selected in the range 50 ~ 150 ns (recommended R1 = 100 Ω , C1 = 1 nF).
19. Each wiring pattern inductance of point A should be minimized (recommend less than 10 nH). Use the shunt resistor R4 of surface mounted (SMD) type to reduce wiring
inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R4 as close as possible.
20. To insert the shunt resistor to measure each phase current at NU, NV, NW terminal, it makes to change the trip level ISC about the short-ciruit current.
21. To prevent errors of the protection function, the wiring of points B, C, and D should be as short as possible. The wiring of B between CSC filter and RSC terminal should be
divided at the point that is close to the terminal of sense resistor R5.
22. For stable protection function, use the sense resistor R5 with resistance variation within 1% and low inductance value.
23. In the short-circuit protection circuit, select the R6C6 time constant in the range 1.0 ~ 1.5 ms. R6 should be selected with a minimum of 10 times larger resistance than sense
resistor R5. Do enough evaluaiton on the real system because short-circuit protection time may vary wiring pattern layout and value of the R6C6 time constant.
24. Each capacitor should be mounted as close to the pins of the Motion SPM® 2 product as possible.
25. To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high-frequency non-
inductive capacitor of around 0.1 ~ 0.22 mF between the P & GND pins is recommended.
26. Relays are used in most systems of electrical equipments in industrial application. In these cases, there should be sufficient distance between the CPU and the relays.
27. The Zener diode or transient voltage suppressor should be adapted for the protection of ICs from the surge destruction between each pair of control supply terminals
(recommanded Zener diode is 22 V / 1 W, which has the lower Zener impedance characteristic than about 15 Ω ).
28. C2 of around seven times larger than bootstrap capacitor C3 is recommended.
29. Please choose the electrolytic capacitor with good temperature characteristic in C3. Choose 0.1 ~ 0.2 mF R-category ceramic capacitors with good temperature and frequency
characteristics in C4.
©2013 Fairchild Semiconductor Corporation
13
FNA21012A Rev. C0
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