FAN5234_10 Datasheet, PDF (11/15 Pages) Fairchild Semiconductor – Dual Mobile-Friendly PWM / PFM Controller

Design and Component Selection
Guidelines
As an initial step, define operating input voltage range,
output voltage, and minimum and maximum load
currents for the controller.
For the examples in the following discussion, select
components for:
VIN from 5V to 20V
VOUT = 1.8V at ILOAD(MAX) = 3.5A
Setting the Output Voltage
The internal reference is 0.9V. The output is divided
down by a voltage divider to the VSEN pin (for example,
R1 and R2 in Figure 1). The output voltage therefore is:
0.9V
=
V
OUT
− 0.9V
R2
R1
(11)
To minimize noise pickup on this node, keep the
resistor to GND (R2) below 2K; for example R2 at
1.82K, then choose R5:
R5 = ^{(1.82KΩ)× (1.8V − 0.9)} = 1.82K
0.9
(12)
Output Inductor Selection
The minimum practical output inductor value keeps
inductor current just on the boundary of continuous
conduction at some minimum load. The industry
standard practice is to choose the ripple current to be
somewhere from 15% to 35% of the nominal current. At
light-load, the ripple current determines the point where
the converter automatically switches to Hysteretic Mode
to sustain high efficiency. The following equations help
to choose the proper value of the output filter inductor:
ΔV
ΔI = 2 − 1 = ^OUT
MIN _ESR
(13)
where ΔI is the inductor ripple current, which is chosen
for 20% of the full load current and ΔVOUT is the
maximum output ripple voltage allowed:
V −V
V
L = ^IN
× ^OUT
OUT
f × ΔI V
SW
IN
(14)
For this example, use:
VIN = 20V, VOUT = 1.8V
(15)
∆I = 20% x 3.5A = 0.7A
fSW = 300KHz.
Therefore;
(16)
L ≈8µH
Output Capacitor Selection
The output capacitor serves two major functions in a
switching power supply. Along with the inductor, it filters
the sequence of pulses produced by the switcher and it
supplies the load transient currents. The output
capacitor requirements are usually dictated by ESR,
inductor ripple current (ΔI), and the allowable ripple
voltage (ΔV):
ESR < ^ΔV
(17)
ΔI
For
this
example,
ESR_(MAX)
=
ΔV
ΔI
=
0.1V
0.7A
= 142mΩ
In addition, the capacitor's ESR must be low enough to
allow the converter to stay in regulation during a load
step. The ripple voltage due to ESR for the converter in
Figure 1 is 100mVPP. Some additional ripple will appear
due to the capacitance value itself:
ΔV =
ΔI
C_OUT × 8 × f_SW
(18)
which is only about 1.5mV for the converter in Figure 1
and can be ignored.
The capacitor must also be rated to withstand the RMS
current, which is approximately 0.3 X (ΔI) or about
210mA for the converter in Figure 1. High-frequency
decoupling capacitors should be placed as close to the
loads as physically possible.
Input Capacitor Selection
The input capacitor should be selected by its ripple
current rating. The input RMS current at maximum load
current (IL) is:
2
I =I D−D
RMS
L
(19)
where the converter duty cycle; D = ^VOUT , which for
V_IN
the circuit in Figure 1, with VIN=6, calculates to
I_RMS = 1.6A .
Power MOSFET Selection
Losses in a MOSFET are the sum of its switching (PSW)
and conduction (PCOND) losses.
In typical applications, the FAN5234 converter's output
voltage is low with respect to its input voltage.
Therefore, the lower MOSFET (Q2) is conducting the
full-load current for most of the cycle. Q2 should
therefore be selected to minimize conduction losses,
thereby selecting a MOSFET with low RDS(ON).
In contrast, the high-side MOSFET (Q1) has a shorter
duty cycle, and its conduction loss has less impact. Q1,
however, sees most of the switching losses, so Q1's
primary selection criteria should be gate charge.
© 2004 Fairchild Semiconductor Corporation
FAN5234 • Rev. 2.0.0
11
www.fairchildsemi.com