FQP3N50C Datasheet, PDF (1/10 Pages) Fairchild Semiconductor – 500V N-Channel MOSFET

FQP3N50C/FQPF3N50C
500V N-Channel MOSFET
Features
• 3 A, 500 V, R_DS(on) = 2.5 Ω @ V_GS = 10 V
• Low gate charge ( typical 10 nC )
• Low Crss ( typical 8.5 pF)
• Fast switching
• 100 % avalanche tested
• Improved dv/dt capability
QFET^®
Description
These N-Channel enhancement mode power field effect transis-
tors are produced using Fairchild’s proprietary, planar stripe,
DMOS technology.
This advanced technology has been especially tailored to mini-
mize on-state resistance, provide superior switching perfor-
mance, and withstand high energy pulse in the avalanche and
commutation mode. These devices are well suited for high effi-
ciency switched mode power supplies, active power factor cor-
rection, electronic lamp ballasts based on half bridge topology.
GDS
TO-220
FQP Series
GD S
Absolute Maximum Ratings
Symbol
Parameter
V_DSS
I_D
I_DM
V_GSS
E_AS
I_AR
E_AR
dv/dt
P_D
Drain-Source Voltage
Drain Current - Continuous (T_C = 25°C)
- Continuous (T_C = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T_C = 25°C)
- Derate above 25°C
(Note 2)
(Note 1)
(Note 1)
(Note 3)
T_J, T_STG
T_L
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
* Drain current limited by maximum junction temperature
Thermal Characteristics
Symbol
R_θJC
R_θJS
R_θJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Case-to-Sink Typ.
Thermal Resistance, Junction-to-Ambient
©2005 Fairchild Semiconductor Corporation
1
FQP3N50C/FQPF3N50C Rev. A
TO-220F
FQPF Series
D
{
G{
●
◀▲
●
●
{
S
FQP3N50C FQPF3N50C
500
3
3*
1.8
1.8 *
12
12 *
± 30
200
3
6.2
4.5
62
25
0.5
0.2
-55 to +150
300
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
FQP3N50C
2.0
0.5
62.5
FQPF3N50C
4.9
--
62.5
Units
°C/W
°C/W
°C/W
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