XRT71D00 Datasheet, PDF (9/18 Pages) Exar Corporation – E3/DS3/STS-1 JITTER ATTENUATOR,STS-1 TO DS3 DESYNCHRONIZER

XRT71D00
E3/DS3/STS-1 JITTER ATTENUATOR,STS-1 TO DS3 DESYNCHRONIER

REV. 1.01
SYSTEM DESCRIPTION
The XRT71D00 is an integrated E3/DS3/STS-1 jitter
attenuator that attenuates the jitter from the input clock
and data.The jitter attenuation performance meets the
latest specifications such as Bellcore GR-499
CORE,GR-253 CORE, ETSI TBR24,ITU-T G.751,ITU-
T G.752 and ITU-T G.755 standards.
In addition, the XRT71D00 also meets both the “map-
ping” and “pointer adjustment” jitter generation crite-
ria for both Category I and Category II interfaces as
specified in Bellcore GR-253.
The XRT71D00 also meets the DS3 wander specifi-
cation that apply to SONET and asynchronous inter-
faces as specified in the ANSI T1.105.03b 1997 stan-
dard.
Additionally, to support loop-timing applications, the
XRT71D00 device can also be used to reduce and
limit the amount of jitter in the recovered line clock
signal.
Figure 1 presents a simple block diagram of the
XRT71D00 device, when it is configured to operate in
the “Hardware” Mode and Figure 2 presents a simple
block diagram of the XRT71D00 device, when it is
configured to operate in the “Host” Mode.
FIGURE 1. ILLUSTRATION OF THE XRT71D00 ( CONFIGURED TO OPERATE IN THE “HARDWARE” MODE)
BWS
ICT
DJA
RClk
ClkES
RPOS
RNEG
FSS
HOST/HW
RST
DS3/E3
Jittery
Clock
Timing Control Block /
Phase locked Loop
Smoothed
Clock
Write Clock
Read Clock
16/32 Bit FIFO
MClk
RRClk
RRPOS
RRNEG
FL
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